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author | Minkyu Kang <mk7.kang@samsung.com> | 2010-04-19 10:26:18 +0900 |
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committer | Minkyu Kang <mk7.kang@samsung.com> | 2010-04-19 10:26:18 +0900 |
commit | 83653121d7382fccfe329cb732f77f116341ef1d (patch) | |
tree | 0b1ce6764252af15dfb2614372de98a44a7ec61f /include/configs/M54455EVB.h | |
parent | 0f1f21a345e02a68ec16f7ab9e7dc687f9276089 (diff) | |
parent | 07739bcef5da07cc4a4edef8b91014ccc332eda3 (diff) | |
download | u-boot-imx-83653121d7382fccfe329cb732f77f116341ef1d.zip u-boot-imx-83653121d7382fccfe329cb732f77f116341ef1d.tar.gz u-boot-imx-83653121d7382fccfe329cb732f77f116341ef1d.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
cpu/arm1176/cpu.c
cpu/arm1176/start.S
cpu/arm_cortexa8/s5pc1xx/Makefile
cpu/arm_cortexa8/s5pc1xx/clock.c
drivers/serial/serial_s5p.c
include/asm-arm/arch-s5pc1xx/clk.h
include/asm-arm/arch-s5pc1xx/gpio.h
include/asm-arm/arch-s5pc1xx/uart.h
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'include/configs/M54455EVB.h')
-rw-r--r-- | include/configs/M54455EVB.h | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 7737284..5b4bba8 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -279,7 +279,7 @@ * Definitions for initial stack pointer and data area (in DPRAM) */ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 -#define CONFIG_SYS_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */ +#define CONFIG_SYS_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_CTRL 0x221 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 32) @@ -408,6 +408,21 @@ */ #define CONFIG_SYS_CACHELINE_SIZE 16 +#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_END - 8) +#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_END - 4) +#define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA) +#define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA) +#define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ + CF_ACR_EN | CF_ACR_SM_ALL) +#define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \ + CF_CACR_ICINVA | CF_CACR_EUSP) +#define CONFIG_SYS_CACHE_DCACR ((CONFIG_SYS_CACHE_ICACR | \ + CF_CACR_DEC | CF_CACR_DDCM_P | \ + CF_CACR_DCINVA) & ~CF_CACR_ICINVA) + /*----------------------------------------------------------------------- * Memory bank definitions */ |