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| author | Wolfgang Denk <wd@denx.de> | 2010-10-26 13:32:32 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-10-26 21:03:25 +0200 |
| commit | 553f09823cced77296825f615f00321d932bf914 (patch) | |
| tree | ece64fa72984f32b062032c56be6b3f53a789a59 /include/configs/M5272C3.h | |
| parent | 9685951464c9c17f075d50081b1ee15659f5740d (diff) | |
| download | u-boot-imx-553f09823cced77296825f615f00321d932bf914.zip u-boot-imx-553f09823cced77296825f615f00321d932bf914.tar.gz u-boot-imx-553f09823cced77296825f615f00321d932bf914.tar.bz2 | |
Rename CONFIG_SYS_INIT_RAM_END into CONFIG_SYS_INIT_RAM_SIZE
CONFIG_SYS_INIT_RAM_END was a misnomer as it suggests this might be
some end address; to make the meaning more clear we rename it into
CONFIG_SYS_INIT_RAM_SIZE
No other code changes are performed in this patch, only minor editing
of white space (due to the changed length) and the comments was done,
where noticed.
Note that the code for the PATI and cmi_mpc5xx board configurations
looks seriously broken. Last known maintainers on Cc:
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Denis Peter <d.peter@mpl.ch>
Cc: Martin Winistoerfer <martinwinistoerfer@gmx.ch>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/configs/M5272C3.h')
| -rw-r--r-- | include/configs/M5272C3.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index f704bb3..dd5ca08 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -163,9 +163,9 @@ * Definitions for initial stack pointer and data area (in DPRAM) */ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 -#define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */ +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ #define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /*----------------------------------------------------------------------- @@ -213,9 +213,9 @@ #define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_END - 8) + CONFIG_SYS_INIT_RAM_SIZE - 8) #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_END - 4) + CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ |