ColdFire: Update Freescale MCF52x2 platforms

Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>

1 files changed, 69 insertions, 36 deletions

diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h
index cc456dc..2b8734b 100644
--- a/include/configs/M5272C3.h
+++ b/include/configs/M5272C3.h
@@ -33,18 +33,20 @@
  * High Level Configuration Options
  * (easy to change)
  */
-#define CONFIG_MCF52x2			/* define processor family */
-#define CONFIG_M5272			/* define processor type */
+#define CONFIG_MCF52x2		/* define processor family */
+#define CONFIG_M5272		/* define processor type */
 
-#define FEC_ENET
+#define CONFIG_MCFTMR
 
+#define CONFIG_MCFUART
+#define CFG_UART_PORT		(0)
 #define CONFIG_BAUDRATE		19200
 #define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
 
-#define CONFIG_WATCHDOG
+#undef CONFIG_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT 10000	/* timeout in milliseconds */
 
-#define CONFIG_MONITOR_IS_IN_RAM	/* define if monitor is started from a pre-loader */
+#undef CONFIG_MONITOR_IS_IN_RAM	/* define if monitor is started from a pre-loader */
 
 /* Configuration for environment
  * Environment is embedded in u-boot in the second sector of the flash
@@ -60,7 +62,6 @@
 #define CFG_ENV_IS_IN_FLASH	1
 #endif
 
-
 /*
  * BOOTP options
  */
@@ -69,37 +70,82 @@
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_HOSTNAME
 
-
 /*
  * Command line configuration.
  */
 #include <config_cmd_default.h>
 
 #define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_MEMORY
 
 #undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_LOADB
 
-
 #define CONFIG_BOOTDELAY	5
+#define CONFIG_MCFFEC
+#ifdef CONFIG_MCFFEC
+#	define CONFIG_NET_MULTI		1
+#	define CONFIG_MII		1
+#	define CFG_DISCOVER_PHY
+#	define CFG_RX_ETH_BUFFER	8
+#	define CFG_FAULT_ECHO_LINK_DOWN
+
+#	define CFG_FEC0_PINMUX		0
+#	define CFG_FEC0_MIIBASE		CFG_FEC0_IOBASE
+#	define MCFFEC_TOUT_LOOP 	50000
+/* If CFG_DISCOVER_PHY is not defined - hardcoded */
+#	ifndef CFG_DISCOVER_PHY
+#		define FECDUPLEX	FULL
+#		define FECSPEED		_100BASET
+#	else
+#		ifndef CFG_FAULT_ECHO_LINK_DOWN
+#			define CFG_FAULT_ECHO_LINK_DOWN
+#		endif
+#	endif			/* CFG_DISCOVER_PHY */
+#endif
+
+#ifdef CONFIG_MCFFEC
+#	define CONFIG_ETHADDR	00:e0:0c:bc:e5:60
+#	define CONFIG_IPADDR	192.162.1.2
+#	define CONFIG_NETMASK	255.255.255.0
+#	define CONFIG_SERVERIP	192.162.1.1
+#	define CONFIG_GATEWAYIP	192.162.1.1
+#	define CONFIG_OVERWRITE_ETHADDR_ONCE
+#endif				/* CONFIG_MCFFEC */
+
+#define CONFIG_HOSTNAME		M5272C3
+#define CONFIG_EXTRA_ENV_SETTINGS		\
+	"netdev=eth0\0"				\
+	"loadaddr=10000\0"			\
+	"u-boot=u-boot.bin\0"			\
+	"load=tftp ${loadaddr) ${u-boot}\0"	\
+	"upd=run load; run prog\0"		\
+	"prog=prot off ffe00000 ffe3ffff;"	\
+	"era ffe00000 ffe3ffff;"		\
+	"cp.b ${loadaddr} ffe00000 ${filesize};"\
+	"save\0"				\
+	""
 
 #define CFG_PROMPT		"-> "
-#define CFG_LONGHELP				/* undef to save memory		*/
+#define CFG_LONGHELP		/* undef to save memory */
 
 #if defined(CONFIG_CMD_KGDB)
-#define CFG_CBSIZE		1024		/* Console I/O Buffer Size	*/
+#define CFG_CBSIZE		1024	/* Console I/O Buffer Size      */
 #else
-#define CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
+#define CFG_CBSIZE		256	/* Console I/O Buffer Size      */
 #endif
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-#define CFG_MAXARGS		16		/* max number of command args	*/
-#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/
 
+#define CFG_PBSIZE		(CFG_CBSIZE+sizeof(CFG_PROMPT)+16)	/* Print Buffer Size */
+#define CFG_MAXARGS		16	/* max number of command args   */
+#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size    */
 #define CFG_LOAD_ADDR		0x20000
-
 #define CFG_MEMTEST_START	0x400
 #define CFG_MEMTEST_END		0x380000
-
 #define CFG_HZ			1000
 #define CFG_CLK			66000000
 
@@ -108,20 +154,15 @@
  * (address mappings, register initial values, etc.)
  * You should know what you are doing if you make changes here.
  */
-
 #define CFG_MBAR		0x10000000	/* Register Base Addrs */
-
 #define CFG_SCR			0x0003;
 #define CFG_SPR			0xffff;
 
-#define CFG_DISCOVER_PHY
-#define CFG_ENET_BD_BASE	0x380000
-
 /*-----------------------------------------------------------------------
  * Definitions for initial stack pointer and data area (in DPRAM)
  */
 #define CFG_INIT_RAM_ADDR	0x20000000
-#define CFG_INIT_RAM_END	0x1000	/* End of used area in internal SRAM	*/
+#define CFG_INIT_RAM_END	0x1000	/* End of used area in internal SRAM    */
 #define CFG_GBL_DATA_SIZE	64	/* size in bytes reserved for initial data */
 #define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 #define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
@@ -132,7 +173,7 @@
  * Please note that CFG_SDRAM_BASE _must_ start at 0
  */
 #define CFG_SDRAM_BASE		0x00000000
-#define CFG_SDRAM_SIZE		4		/* SDRAM size in MB */
+#define CFG_SDRAM_SIZE		4	/* SDRAM size in MB */
 #define CFG_FLASH_BASE		0xffe00000
 
 #ifdef	CONFIG_MONITOR_IS_IN_RAM
@@ -150,13 +191,13 @@
  * have to be in the first 8 MB of memory, since this is
  * the maximum mapped by the Linux kernel during initialization ??
  */
-#define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
+#define CFG_BOOTMAPSZ		(CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
 
 /*-----------------------------------------------------------------------
  * FLASH organization
  */
-#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
-#define CFG_MAX_FLASH_SECT	11	/* max number of sectors on one chip	*/
+#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks           */
+#define CFG_MAX_FLASH_SECT	11	/* max number of sectors on one chip    */
 #define CFG_FLASH_ERASE_TOUT	1000
 
 /*-----------------------------------------------------------------------
@@ -169,25 +210,18 @@
  */
 #define CFG_BR0_PRELIM		0xFFE00201
 #define CFG_OR0_PRELIM		0xFFE00014
-
 #define CFG_BR1_PRELIM		0
 #define CFG_OR1_PRELIM		0
-
 #define CFG_BR2_PRELIM		0x30000001
 #define CFG_OR2_PRELIM		0xFFF80000
-
 #define CFG_BR3_PRELIM		0
 #define CFG_OR3_PRELIM		0
-
 #define CFG_BR4_PRELIM		0
 #define CFG_OR4_PRELIM		0
-
 #define CFG_BR5_PRELIM		0
 #define CFG_OR5_PRELIM		0
-
 #define CFG_BR6_PRELIM		0
 #define CFG_OR6_PRELIM		0
-
 #define CFG_BR7_PRELIM		0x00000701
 #define CFG_OR7_PRELIM		0xFFC0007C
 
@@ -197,9 +231,8 @@
 #define CFG_PACNT		0x00000000
 #define CFG_PADDR		0x0000
 #define CFG_PADAT		0x0000
-#define CFG_PBCNT		0x55554155		/* Ethernet/UART configuration */
+#define CFG_PBCNT		0x55554155	/* Ethernet/UART configuration */
 #define CFG_PBDDR		0x0000
 #define CFG_PBDAT		0x0000
 #define CFG_PDCNT		0x00000000
-
-#endif	/* _M5272C3_H */
+#endif				/* _M5272C3_H */