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authorWolfgang Denk <wd@denx.de>2010-03-28 00:04:18 +0100
committerWolfgang Denk <wd@denx.de>2010-03-28 00:04:18 +0100
commitbe1a91320ce0cb7330bb650d1576bb56c55092af (patch)
treef6bb6d34565d4f5b3386a23885fb3df6c17e0456 /include/configs/M5271EVB.h
parent6b94b4962211c16ee2197048faa887e1f92f3757 (diff)
parent9d3a86aec52cb3c0e9badd12167d9292184ce4dd (diff)
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Merge branch 'next' of git://git.denx.de/u-boot-coldfire into next
Diffstat (limited to 'include/configs/M5271EVB.h')
-rw-r--r--include/configs/M5271EVB.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/include/configs/M5271EVB.h b/include/configs/M5271EVB.h
index 50b3ab2..798949c 100644
--- a/include/configs/M5271EVB.h
+++ b/include/configs/M5271EVB.h
@@ -72,6 +72,7 @@
*/
#include <config_cmd_default.h>
+#define CONFIG_CMD_CACHE
#define CONFIG_CMD_PING
#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
@@ -229,6 +230,19 @@
/* Cache Configuration */
#define CONFIG_SYS_CACHELINE_SIZE 16
+#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
+#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
+ CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+ CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
+ CF_CACR_DISD | CF_CACR_INVI | \
+ CF_CACR_CEIB | CF_CACR_DCM | \
+ CF_CACR_EUSP)
+
/* Chip Select 0 : Boot Flash */
#define CONFIG_SYS_CS0_BASE 0xFFE00000
#define CONFIG_SYS_CS0_MASK 0x001F0001