diff options
| author | TsiChung Liew <Tsi-Chung.Liew@freescale.com> | 2008-10-21 10:03:07 +0000 |
|---|---|---|
| committer | John Rigby <jrigby@freescale.com> | 2008-11-03 09:45:58 -0700 |
| commit | 012522fef3b382469125beb46a315ab4dee02fb0 (patch) | |
| tree | 9bc6b0cc47ec08dd3efb07a75eaa50fd04ec5f32 /include/configs/M5253EVBE.h | |
| parent | ac2331aee99ad36be0fcfed8c49922e3c61b576d (diff) | |
| download | u-boot-imx-012522fef3b382469125beb46a315ab4dee02fb0.zip u-boot-imx-012522fef3b382469125beb46a315ab4dee02fb0.tar.gz u-boot-imx-012522fef3b382469125beb46a315ab4dee02fb0.tar.bz2 | |
ColdFire: Modules header files cleanup
Consolidate ATA, ePORT, QSPI, FlexCan, PWM, RNG,
MDHA, SKHA, INTC, and FlexBus structures and
definitions in immap_5xxx.h to more unify modules
header files. Append DSPI support for m547x_8x.
SSI cleanup. Remove USB Host structure from immap_539.h.
Apply changes to use FlexBus structures in mcf52x2's
cpu_init.c and platform configuration files.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Diffstat (limited to 'include/configs/M5253EVBE.h')
| -rw-r--r-- | include/configs/M5253EVBE.h | 20 |
1 files changed, 4 insertions, 16 deletions
diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h index c2cd62b..86de97d 100644 --- a/include/configs/M5253EVBE.h +++ b/include/configs/M5253EVBE.h @@ -166,7 +166,7 @@ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) /* FLASH organization */ -#define CONFIG_SYS_FLASH_BASE 0xffe00000 +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ #define CONFIG_SYS_MAX_FLASH_SECT 35 /* max number of sectors on one chip */ #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 @@ -182,21 +182,9 @@ /* Port configuration */ #define CONFIG_SYS_FECI2C 0xF0 -#define CONFIG_SYS_CSAR0 0xFFE0 -#define CONFIG_SYS_CSMR0 0x001F0021 -#define CONFIG_SYS_CSCR0 0x1D80 - -#define CONFIG_SYS_CSAR1 0 -#define CONFIG_SYS_CSMR1 0 -#define CONFIG_SYS_CSCR1 0 - -#define CONFIG_SYS_CSAR2 0 -#define CONFIG_SYS_CSMR2 0 -#define CONFIG_SYS_CSCR2 0 - -#define CONFIG_SYS_CSAR3 0 -#define CONFIG_SYS_CSMR3 0 -#define CONFIG_SYS_CSCR3 0 +#define CONFIG_SYS_CS0_BASE 0xFFE00000 +#define CONFIG_SYS_CS0_MASK 0x001F0021 +#define CONFIG_SYS_CS0_CTRL 0x00001D80 /*----------------------------------------------------------------------- * Port configuration |