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authorTsiChung Liew <Tsi-Chung.Liew@freescale.com>2008-10-21 10:03:07 +0000
committerJohn Rigby <jrigby@freescale.com>2008-11-03 09:45:58 -0700
commit012522fef3b382469125beb46a315ab4dee02fb0 (patch)
tree9bc6b0cc47ec08dd3efb07a75eaa50fd04ec5f32 /include/configs/M5253DEMO.h
parentac2331aee99ad36be0fcfed8c49922e3c61b576d (diff)
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ColdFire: Modules header files cleanup
Consolidate ATA, ePORT, QSPI, FlexCan, PWM, RNG, MDHA, SKHA, INTC, and FlexBus structures and definitions in immap_5xxx.h to more unify modules header files. Append DSPI support for m547x_8x. SSI cleanup. Remove USB Host structure from immap_539.h. Apply changes to use FlexBus structures in mcf52x2's cpu_init.c and platform configuration files. Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Diffstat (limited to 'include/configs/M5253DEMO.h')
-rw-r--r--include/configs/M5253DEMO.h24
1 files changed, 8 insertions, 16 deletions
diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index 3a5c12f..378e45a 100644
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -90,7 +90,7 @@
#define CONFIG_DRIVER_DM9000
#ifdef CONFIG_DRIVER_DM9000
-# define CONFIG_DM9000_BASE ((CONFIG_SYS_CSAR1 << 16) | 0x300)
+# define CONFIG_DM9000_BASE (CONFIG_SYS_CS1_BASE | 0x300)
# define DM9000_IO CONFIG_DM9000_BASE
# define DM9000_DATA (CONFIG_DM9000_BASE + 4)
# undef CONFIG_DM9000_DEBUG
@@ -202,7 +202,7 @@
#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
/* FLASH organization */
-#define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CSAR0 << 16)
+#define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE)
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT 2048 /* max number of sectors on one chip */
#define CONFIG_SYS_FLASH_ERASE_TOUT 1000
@@ -233,21 +233,13 @@
/* Port configuration */
#define CONFIG_SYS_FECI2C 0xF0
-#define CONFIG_SYS_CSAR0 0xFF80
-#define CONFIG_SYS_CSMR0 0x007F0021
-#define CONFIG_SYS_CSCR0 0x1D80
+#define CONFIG_SYS_CS0_BASE 0xFF800000
+#define CONFIG_SYS_CS0_MASK 0x007F0021
+#define CONFIG_SYS_CS0_CTRL 0x00001D80
-#define CONFIG_SYS_CSAR1 0xE000
-#define CONFIG_SYS_CSMR1 0x00000001
-#define CONFIG_SYS_CSCR1 0x3DD8
-
-#define CONFIG_SYS_CSAR2 0
-#define CONFIG_SYS_CSMR2 0
-#define CONFIG_SYS_CSCR2 0
-
-#define CONFIG_SYS_CSAR3 0
-#define CONFIG_SYS_CSMR3 0
-#define CONFIG_SYS_CSCR3 0
+#define CONFIG_SYS_CS1_BASE 0xE0000000
+#define CONFIG_SYS_CS1_MASK 0x00000001
+#define CONFIG_SYS_CS1_CTRL 0x00003DD8
/*-----------------------------------------------------------------------
* Port configuration