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author | Wolfgang Denk <wd@denx.de> | 2008-11-09 00:01:42 +0100 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-11-09 00:01:42 +0100 |
commit | c06d9bbbeb0416f189e841ffb214ada6194ed874 (patch) | |
tree | 07ffabf1f239a50bb5a0d6d77745d9e83ad0c9d4 /include/configs/M5249EVB.h | |
parent | a80b21d5127583171d6e9bc7f722947641898012 (diff) | |
parent | e4f69d1bd21a12049744989d2dd6b5199c9b8f23 (diff) | |
download | u-boot-imx-c06d9bbbeb0416f189e841ffb214ada6194ed874.zip u-boot-imx-c06d9bbbeb0416f189e841ffb214ada6194ed874.tar.gz u-boot-imx-c06d9bbbeb0416f189e841ffb214ada6194ed874.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-coldfire
Diffstat (limited to 'include/configs/M5249EVB.h')
-rw-r--r-- | include/configs/M5249EVB.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 8699ef9..e3830e5 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -125,7 +125,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ -#define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CSAR0 << 16) +#define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) #if 0 /* test-only */ #define CONFIG_PRAM 512 /* test-only for SDRAM problem!!!!!!!!!!!!!!!!!!!! */ @@ -170,15 +170,15 @@ */ /* CS0 - AMD Flash, address 0xffc00000 */ -#define CONFIG_SYS_CSAR0 0xffe0 -#define CONFIG_SYS_CSCR0 0x1980 /* WS=0110, AA=1, PS=10 */ +#define CONFIG_SYS_CS0_BASE 0xffe00000 +#define CONFIG_SYS_CS0_CTRL 0x00001980 /* WS=0110, AA=1, PS=10 */ /** Note: There is a CSMR0/DRAM vector problem, need to disable C/I ***/ -#define CONFIG_SYS_CSMR0 0x003f0021 /* 4MB, AA=0, WP=0, C/I=1, V=1 */ +#define CONFIG_SYS_CS0_MASK 0x003f0021 /* 4MB, AA=0, WP=0, C/I=1, V=1 */ /* CS1 - FPGA, address 0xe0000000 */ -#define CONFIG_SYS_CSAR1 0xe000 -#define CONFIG_SYS_CSCR1 0x0d80 /* WS=0011, AA=1, PS=10 */ -#define CONFIG_SYS_CSMR1 0x00010001 /* 128kB, AA=0, WP=0, C/I=0, V=1*/ +#define CONFIG_SYS_CS1_BASE 0xe0000000 +#define CONFIG_SYS_CS1_CTRL 0x00000d80 /* WS=0011, AA=1, PS=10 */ +#define CONFIG_SYS_CS1_MASK 0x00010001 /* 128kB, AA=0, WP=0, C/I=0, V=1*/ /*----------------------------------------------------------------------- * Port configuration |