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| author | Wolfgang Denk <wd@denx.de> | 2010-04-01 11:28:32 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-04-01 11:28:32 +0200 |
| commit | ffa37fc98d71ef930bccd4e9eed37f6ce6b4d6af (patch) | |
| tree | 206908754219b5cc6e9f03518d34fb95a247bef9 /include/configs/M5208EVBE.h | |
| parent | ca6e1c136ddb720c3bb2cc043b99f7f06bc46c55 (diff) | |
| parent | fd03ea89641d6f6ade6d1a8580c1bb9f52b8542c (diff) | |
| download | u-boot-imx-ffa37fc98d71ef930bccd4e9eed37f6ce6b4d6af.zip u-boot-imx-ffa37fc98d71ef930bccd4e9eed37f6ce6b4d6af.tar.gz u-boot-imx-ffa37fc98d71ef930bccd4e9eed37f6ce6b4d6af.tar.bz2 | |
Merge branch 'next'
Diffstat (limited to 'include/configs/M5208EVBE.h')
| -rw-r--r-- | include/configs/M5208EVBE.h | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 32123d2..e6632ac 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -158,7 +158,7 @@ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */ +#define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ #define CONFIG_SYS_SDRAM_CFG1 0x43711630 #define CONFIG_SYS_SDRAM_CFG2 0x56670000 #define CONFIG_SYS_SDRAM_CTRL 0xE1002000 @@ -207,6 +207,19 @@ /* Cache Configuration */ #define CONFIG_SYS_CACHELINE_SIZE 16 +#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_END - 8) +#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_END - 4) +#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) +#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ + CF_ACR_EN | CF_ACR_SM_ALL) +#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ + CF_CACR_DISD | CF_CACR_INVI | \ + CF_CACR_CEIB | CF_CACR_DCM | \ + CF_CACR_EUSP) + /* Chipselect bank definitions */ /* * CS0 - NOR Flash |