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| author | York Sun <yorksun@freescale.com> | 2014-09-08 12:20:01 -0700 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-09-25 08:36:19 -0700 |
| commit | 8bfa301b0a30f57888d2117767b23f168760bc40 (patch) | |
| tree | 623535f20c95354efb54eb2313393bd3499cbfe4 /include/configs/HWW1U1A.h | |
| parent | 40f8dec54d7803975aed1c88327002c95ea99908 (diff) | |
| download | u-boot-imx-8bfa301b0a30f57888d2117767b23f168760bc40.zip u-boot-imx-8bfa301b0a30f57888d2117767b23f168760bc40.tar.gz u-boot-imx-8bfa301b0a30f57888d2117767b23f168760bc40.tar.bz2 | |
ARMv8/ls2085a: Enable secondary cores
Spin table is at the very beginning of boot code. Each core has an individual
release address within the spin table, the ft_cpu_setup fn updates the
"cpu-release-addr" property of each cpu node with the corresponding release
address.
Also fix CPU_RELEASE_ADDR to point to secondary_boot_func.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
Diffstat (limited to 'include/configs/HWW1U1A.h')
0 files changed, 0 insertions, 0 deletions