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| author | York Sun <yorksun@freescale.com> | 2013-09-30 09:22:09 -0700 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-11-25 11:43:43 -0800 |
| commit | 5614e71b4956c579cd4419b958b33fa6316eaa92 (patch) | |
| tree | f75d1d531814dbbe0ff9d65f28cc050a73a8f7de /include/configs/HWW1U1A.h | |
| parent | ac6880782d8f369b7121488e8407ae6ddcf2b9ff (diff) | |
| download | u-boot-imx-5614e71b4956c579cd4419b958b33fa6316eaa92.zip u-boot-imx-5614e71b4956c579cd4419b958b33fa6316eaa92.tar.gz u-boot-imx-5614e71b4956c579cd4419b958b33fa6316eaa92.tar.bz2 | |
Driver/DDR: Moving Freescale DDR driver to a common driver
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include/configs/HWW1U1A.h')
| -rw-r--r-- | include/configs/HWW1U1A.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/HWW1U1A.h b/include/configs/HWW1U1A.h index f3f2136..bbfee7d 100644 --- a/include/configs/HWW1U1A.h +++ b/include/configs/HWW1U1A.h @@ -255,7 +255,7 @@ /* -------------------------------------------------------------------- */ /* FreeScale DDR2/3 SDRAM Controller */ -#define CONFIG_FSL_DDR2 /* Our SDRAM slot is DDR2 */ +#define CONFIG_SYS_FSL_DDR2 /* Our SDRAM slot is DDR2 */ #define CONFIG_DDR_ECC /* Enable ECC by default */ #define CONFIG_DDR_SPD /* Detect DDR config from SPD EEPROM */ #define CONFIG_SPD_EEPROM /* ...why 2 config variables for this? */ |