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authorTom Rini <trini@ti.com>2013-07-24 09:22:28 -0400
committerTom Rini <trini@ti.com>2013-07-24 09:50:24 -0400
commitc2120fbfbc4d1f6953228f86be8bdbf38bacfdab (patch)
tree14cd8ec9a0a61f7113149be38d79808cd5e955f8 /include/configs/GEN860T.h
parente85427fd66a21b39145a47e67871a8863c0e5591 (diff)
parentecbd7e1ec7280d90d151a99691f74b892588cadd (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-i2c
The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'include/configs/GEN860T.h')
-rw-r--r--include/configs/GEN860T.h39
1 files changed, 23 insertions, 16 deletions
diff --git a/include/configs/GEN860T.h b/include/configs/GEN860T.h
index 2962c91..06c0e50 100644
--- a/include/configs/GEN860T.h
+++ b/include/configs/GEN860T.h
@@ -142,26 +142,33 @@
/*
* Enable I2C and select the hardware/software driver
*/
-#define CONFIG_HARD_I2C 1 /* CPM based I2C */
-#undef CONFIG_SOFT_I2C /* Bit-banged I2C */
+#define CONFIG_HARD_I2C 1 /* CPM based I2C */
+#undef CONFIG_SYS_I2C_SOFT /* Bit-banged I2C */
#ifdef CONFIG_HARD_I2C
-#define CONFIG_SYS_I2C_SPEED 100000 /* clock speed in Hz */
-#define CONFIG_SYS_I2C_SLAVE 0xFE /* I2C slave address */
+#define CONFIG_SYS_I2C_SPEED 100000 /* clock speed in Hz */
+#define CONFIG_SYS_I2C_SLAVE 0xFE /* I2C slave address */
#endif
-#ifdef CONFIG_SOFT_I2C
-#define PB_SCL 0x00000020 /* PB 26 */
-#define PB_SDA 0x00000010 /* PB 27 */
-#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
-#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
-#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
-#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
-#define I2C_SDA(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
- else immr->im_cpm.cp_pbdat &= ~PB_SDA
-#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
- else immr->im_cpm.cp_pbdat &= ~PB_SCL
-#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
+#ifdef CONFIG_SYS_I2C_SOFT
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
+#define PB_SCL 0x00000020 /* PB 26 */
+#define PB_SDA 0x00000010 /* PB 27 */
+#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
+#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
+#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
+#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
+#define I2C_SDA(bit) if (bit) \
+ immr->im_cpm.cp_pbdat |= PB_SDA; \
+ else \
+ immr->im_cpm.cp_pbdat &= ~PB_SDA
+#define I2C_SCL(bit) if (bit) \
+ immr->im_cpm.cp_pbdat |= PB_SCL; \
+ else \
+ immr->im_cpm.cp_pbdat &= ~PB_SCL
+#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
#endif
/*