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| author | Simon Glass <sjg@chromium.org> | 2012-07-29 20:53:25 +0000 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2012-09-07 13:54:30 -0700 |
| commit | b572595ee95829ab62e354c55a8fbd0f4db23935 (patch) | |
| tree | 18ce59921123f5b98f47e4845bef96f191593cd4 /include/configs/CPCI405.h | |
| parent | 057df193b40d31799d41d43bc832a972f658bfe4 (diff) | |
| download | u-boot-imx-b572595ee95829ab62e354c55a8fbd0f4db23935.zip u-boot-imx-b572595ee95829ab62e354c55a8fbd0f4db23935.tar.gz u-boot-imx-b572595ee95829ab62e354c55a8fbd0f4db23935.tar.bz2 | |
nand: Try to align the default buffers
The NAND layer needs to use cache-aligned buffers by default. Towards this
goal. align the default buffers and their members according to the minimum
DMA alignment defined for the architecture.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'include/configs/CPCI405.h')
0 files changed, 0 insertions, 0 deletions