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author | Andy Fleming <afleming@freescale.com> | 2007-08-03 02:23:23 -0500 |
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committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2007-08-03 02:23:23 -0500 |
commit | 6bf6f114dcdd97ec3f80c2761ed40e31229d6b78 (patch) | |
tree | 4bc9e1362c3090bb6d2df71109228ca61b8d00ce /include/configs/CMS700.h | |
parent | 5a56af3b522ba47fb33a3fee84d23bf1e5429654 (diff) | |
parent | 5dc210dec5bace98a50b6ba905347890091a9bb0 (diff) | |
download | u-boot-imx-6bf6f114dcdd97ec3f80c2761ed40e31229d6b78.zip u-boot-imx-6bf6f114dcdd97ec3f80c2761ed40e31229d6b78.tar.gz u-boot-imx-6bf6f114dcdd97ec3f80c2761ed40e31229d6b78.tar.bz2 |
Merge branch 'testing' into working
Conflicts:
CHANGELOG
fs/fat/fat.c
include/configs/MPC8560ADS.h
include/configs/pcs440ep.h
net/eth.c
Diffstat (limited to 'include/configs/CMS700.h')
-rw-r--r-- | include/configs/CMS700.h | 53 |
1 files changed, 31 insertions, 22 deletions
diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index 1cca285..08ef9b5 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -60,26 +60,35 @@ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ #define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */ -#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \ - CONFIG_BOOTP_DNS | \ - CONFIG_BOOTP_DNS2 | \ - CONFIG_BOOTP_SEND_HOSTNAME ) - -#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ - CFG_CMD_DHCP | \ - CFG_CMD_BSP | \ - CFG_CMD_PCI | \ - CFG_CMD_IRQ | \ - CFG_CMD_ELF | \ - CFG_CMD_NAND | \ - CFG_CMD_I2C | \ - CFG_CMD_DATE | \ - CFG_CMD_MII | \ - CFG_CMD_PING | \ - CFG_CMD_EEPROM ) - -/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include <cmd_confdefs.h> +/* + * BOOTP options + */ +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME + + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_BSP +#define CONFIG_CMD_PCI +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_ELF +#define CONFIG_CMD_NAND +#define CONFIG_CMD_I2C +#define CONFIG_CMD_DATE +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_EEPROM + #define CFG_NAND_LEGACY @@ -100,7 +109,7 @@ #define CFG_PROMPT_HUSH_PS2 "> " #endif -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#if defined(CONFIG_CMD_KGDB) #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ #else #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ @@ -289,7 +298,7 @@ #define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */ /* have only 8kB, 16kB is save here */ #define CFG_CACHELINE_SIZE 32 /* ... */ -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#if defined(CONFIG_CMD_KGDB) #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif |