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author | Jon Loeliger <jdl@freescale.com> | 2008-01-03 09:46:55 -0600 |
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committer | Jon Loeliger <jdl@freescale.com> | 2008-01-03 09:46:55 -0600 |
commit | 2c3536425d987bf079258973e2acebaaef3e16b6 (patch) | |
tree | 659d06dd33eca4888e1f6d01d046507b76dc2d27 /include/configs/CANBT.h | |
parent | f743931f9b4d4e15c9bdfe726bef033ea1f1402c (diff) | |
parent | ce37422d0002e10490e268392e0c4e3028e52cec (diff) | |
download | u-boot-imx-2c3536425d987bf079258973e2acebaaef3e16b6.zip u-boot-imx-2c3536425d987bf079258973e2acebaaef3e16b6.tar.gz u-boot-imx-2c3536425d987bf079258973e2acebaaef3e16b6.tar.bz2 |
Merge commit 'wd/master'
Diffstat (limited to 'include/configs/CANBT.h')
-rw-r--r-- | include/configs/CANBT.h | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/include/configs/CANBT.h b/include/configs/CANBT.h index ae32f6b..7029dbd 100644 --- a/include/configs/CANBT.h +++ b/include/configs/CANBT.h @@ -181,15 +181,6 @@ /* mask of address bits that overflow into the "EEPROM chip address" */ #define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07 -/*----------------------------------------------------------------------- - * Cache Configuration - */ -#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */ -#define CFG_CACHELINE_SIZE 32 /* ... */ -#if defined(CONFIG_CMD_KGDB) -#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ -#endif - /* * Init Memory Controller: * |