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author | Stefan Roese <sr@denx.de> | 2007-06-04 08:17:29 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2007-06-04 08:17:29 +0200 |
commit | d7d5204ce2e0985ff2dfdf3a6b5b6a526cdb1c1e (patch) | |
tree | c71da8013140d7bd5024dcde5f9cd075d4c012e2 /include/configs/BC3450.h | |
parent | 7ebb4479b07ff294eb4d76e420753a0349f7c93b (diff) | |
parent | 19bf91f9628f80a55d4f171df71041574882b3d6 (diff) | |
download | u-boot-imx-d7d5204ce2e0985ff2dfdf3a6b5b6a526cdb1c1e.zip u-boot-imx-d7d5204ce2e0985ff2dfdf3a6b5b6a526cdb1c1e.tar.gz u-boot-imx-d7d5204ce2e0985ff2dfdf3a6b5b6a526cdb1c1e.tar.bz2 |
Merge with git://www.denx.de/git/u-boot.git
Diffstat (limited to 'include/configs/BC3450.h')
-rw-r--r-- | include/configs/BC3450.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/include/configs/BC3450.h b/include/configs/BC3450.h index 5b54f30..bc30977 100644 --- a/include/configs/BC3450.h +++ b/include/configs/BC3450.h @@ -282,17 +282,17 @@ /* * IPB Bus clocking configuration. */ -#define CFG_IPBSPEED_133 /* define for 133MHz speed */ +#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ /* * PCI Bus clocking configuration * * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if - * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet - * hasn't been tested with a IPB Bus Clock of 66 MHz. + * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock + * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz. */ -#if defined(CFG_IPBSPEED_133) -# define CFG_PCISPEED_66 /* define for 66MHz speed */ +#if defined(CFG_IPBCLK_EQUALS_XLBCLK) +# define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */ #endif /* @@ -488,7 +488,7 @@ #define CFG_BOOTCS_START CFG_FLASH_BASE #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE -#ifdef CFG_PCISPEED_66 +#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2 # define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */ #else # define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */ |