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authorStefan Roese <sr@denx.de>2007-10-31 17:57:52 +0100
committerStefan Roese <sr@denx.de>2007-10-31 21:21:47 +0100
commitd25dfe08fbd1220cb994e7e6b105049aa9aa8e79 (patch)
treeb3fe3e942a36d0e6f668194e6cf911a4b436fca8 /include/configs/ASH405.h
parent9b94ac61d2176185c30adf0793e079ec30e68687 (diff)
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ppc4xx: Remove cache definition from 4xx board config files
All 4xx board config files don't need the cache definitions anymore. These are now defined in common headers. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/configs/ASH405.h')
-rw-r--r--include/configs/ASH405.h10
1 files changed, 0 insertions, 10 deletions
diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h
index 9adbba9..85c6a99 100644
--- a/include/configs/ASH405.h
+++ b/include/configs/ASH405.h
@@ -258,16 +258,6 @@
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
#define CFG_EEPROM_PAGE_WRITE_ENABLE
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
- /* have only 8kB, 16kB is save here */
-#define CFG_CACHELINE_SIZE 32 /* ... */
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Init Memory Controller:
*