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author | stroese <stroese> | 2005-04-13 10:06:07 +0000 |
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committer | stroese <stroese> | 2005-04-13 10:06:07 +0000 |
commit | 04e93ec9791503c011b0e606ef7c6d6ec4d6cd62 (patch) | |
tree | 3c01a7d75a334c5adc526f5c7465282883f6c878 /include/configs/APC405.h | |
parent | 2a8af1873894dae030813c11e77ccee476ac11f8 (diff) | |
download | u-boot-imx-04e93ec9791503c011b0e606ef7c6d6ec4d6cd62.zip u-boot-imx-04e93ec9791503c011b0e606ef7c6d6ec4d6cd62.tar.gz u-boot-imx-04e93ec9791503c011b0e606ef7c6d6ec4d6cd62.tar.bz2 |
Update for esd apc405
Diffstat (limited to 'include/configs/APC405.h')
-rw-r--r-- | include/configs/APC405.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/configs/APC405.h b/include/configs/APC405.h index d46b844..2b38927 100644 --- a/include/configs/APC405.h +++ b/include/configs/APC405.h @@ -42,6 +42,8 @@ #define CONFIG_SYS_CLK_FREQ 33333400 /* external frequency to pll */ +#define CONFIG_BOARD_TYPES 1 /* support board types */ + #define CONFIG_BAUDRATE 9600 #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ @@ -321,6 +323,7 @@ /* FPGA internal regs */ #define CFG_FPGA_CTRL 0x008 +#define CFG_FPGA_CTRL2 0x00a /* FPGA Control Reg */ #define CFG_FPGA_CTRL_CF_RESET 0x0001 @@ -348,7 +351,7 @@ /* Image information... */ #define CONFIG_LCD_USED CONFIG_LCD_BIG -#define CFG_LCD_HEADER_NAME "s1d13806_640_480_16bpp.h" +#define CFG_LCD_HEADER_NAME "../common/s1d13806_640_480_16bpp.h" #define CFG_LCD_LOGO_NAME "logo_640_480_24bpp.c" #define CFG_LCD_MEM CFG_LCD_BIG_MEM |