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author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2014-04-04 15:25:06 +0900 |
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committer | Tom Rini <trini@ti.com> | 2014-04-18 10:42:30 -0400 |
commit | 4fb3925ff8b64422eb904c630e914c29ed824e85 (patch) | |
tree | 56bc0d3e8a74821d7f1273c439bb3d50f638f758 /include/commproc.h | |
parent | aa6e1e45cfc16d9ea199d18c639cca2a388823a2 (diff) | |
download | u-boot-imx-4fb3925ff8b64422eb904c630e914c29ed824e85.zip u-boot-imx-4fb3925ff8b64422eb904c630e914c29ed824e85.tar.gz u-boot-imx-4fb3925ff8b64422eb904c630e914c29ed824e85.tar.bz2 |
powerpc: remove RPXClassic, RPXlite boards support
Enough time has passed since these boards were moved to Orphan. Remove.
- Remove board/RPXlite/*
- Remove board/RPXClassic/*
- Remove include/configs/RPXlite.h
- Remove include/configs/RPXClassic.h
- Clean-up defined(CONFIG_RPXCLASSIC)
- Move the entry from boards.cfg to doc/README.scrapyard
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'include/commproc.h')
-rw-r--r-- | include/commproc.h | 35 |
1 files changed, 0 insertions, 35 deletions
diff --git a/include/commproc.h b/include/commproc.h index 605aac2..29a3e61 100644 --- a/include/commproc.h +++ b/include/commproc.h @@ -954,41 +954,6 @@ typedef struct scc_enet { #endif /* CONFIG_QS860T */ -/*** RPXCLASSIC *****************************************************/ - -#ifdef CONFIG_RPXCLASSIC - -#ifdef CONFIG_FEC_ENET - -# define FEC_ENET /* use FEC for EThernet */ -# undef SCC_ENET - -#else /* ! CONFIG_FEC_ENET */ - -/* Bits in parallel I/O port registers that have to be set/cleared - * to configure the pins for SCC1 use. - */ -#define PROFF_ENET PROFF_SCC1 -#define CPM_CR_ENET CPM_CR_CH_SCC1 -#define SCC_ENET 0 -#define PA_ENET_RXD ((ushort)0x0001) -#define PA_ENET_TXD ((ushort)0x0002) -#define PA_ENET_TCLK ((ushort)0x0200) -#define PA_ENET_RCLK ((ushort)0x0800) -#define PB_ENET_TENA ((uint)0x00001000) -#define PC_ENET_CLSN ((ushort)0x0010) -#define PC_ENET_RENA ((ushort)0x0020) - -/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to - * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero. - */ -#define SICR_ENET_MASK ((uint)0x000000ff) -#define SICR_ENET_CLKRT ((uint)0x0000003d) - -#endif /* CONFIG_FEC_ENET */ - -#endif /* CONFIG_RPXCLASSIC */ - /*** RPXLITE ********************************************************/ #ifdef CONFIG_RPXLITE |