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authorYork Sun <yorksun@freescale.com>2011-11-20 10:01:35 -0800
committerKumar Gala <galak@kernel.crashing.org>2011-11-29 08:48:06 -0600
commit4108508a96972e1200867666890d19fb63f76025 (patch)
tree075274001cf896c4bc9208b978204fb2ac483cdd /include/bus_vcxk.h
parent33c875366e1d3e433881a86704816cdad847532f (diff)
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powerpc/85xx: Add workaround for erratum A-003474
Erratum A-003474: Internal DDR calibration circuit is not supported Impact: Experience shows no significant benefit to device operation with auto-calibration enabled versus it disabled. To ensure consistent timing results, Freescale recommends this feature be disabled in future customer products. There should be no impact to parts that are already operating in the field. Workaround: Prior to setting DDR_SDRAM_CFG[MEM_EN]=1, do the following: 1. Write a value of 0x0000_0015 to the register at offset CCSRBAR + DDR OFFSET + 0xf30 2. Write a value of 0x2400_0000 to the register at offset CCSRBAR + DDR OFFSET + 0xf54 Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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