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| author | Stefan Roese <sr@denx.de> | 2011-10-07 01:05:49 +0000 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2011-10-09 22:20:44 +0200 |
| commit | 4b0a03d3756c0bb8f25a9b9df3530e4129a6a70c (patch) | |
| tree | 1aa82d2c6f3d702636802f7d8dffc19605aa9685 /include/bedbug | |
| parent | 13e95e4230acc05407574b594bb7e48cfe92efb8 (diff) | |
| download | u-boot-imx-4b0a03d3756c0bb8f25a9b9df3530e4129a6a70c.zip u-boot-imx-4b0a03d3756c0bb8f25a9b9df3530e4129a6a70c.tar.gz u-boot-imx-4b0a03d3756c0bb8f25a9b9df3530e4129a6a70c.tar.bz2 | |
ppc: Fix DBSR_IAx defines in <bedbug/regs.h>
While adding asm/cache.h to common.h for PPC targets, I got an
error about multiple definitions of some DBSR_ macros. While
scanning these defines, I noticed that some where defined not
correctly for all PPC variants. So I removed all unused defines,
and corrected the ones really used by bedbug (book-e vs. ppc40x).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'include/bedbug')
| -rw-r--r-- | include/bedbug/regs.h | 31 |
1 files changed, 15 insertions, 16 deletions
diff --git a/include/bedbug/regs.h b/include/bedbug/regs.h index 938e435..eb74691 100644 --- a/include/bedbug/regs.h +++ b/include/bedbug/regs.h @@ -143,22 +143,21 @@ #define DBCR1_DV1BE 0x0000F000 #define DBCR1_DV2BE 0x00000F00 -/* Bits for the DBSR register */ -#define DBSR_IC 0x80000000 -#define DBSR_BT 0x40000000 -#define DBSR_EDE 0x20000000 -#define DBSR_TIE 0x10000000 -#define DBSR_UDE 0x08000000 -#define DBSR_IA1 0x04000000 -#define DBSR_IA2 0x02000000 -#define DBSR_DR1 0x01000000 -#define DBSR_DW1 0x00800000 -#define DBSR_DR2 0x00400000 -#define DBSR_DW2 0x00200000 -#define DBSR_IDE 0x00100000 -#define DBSR_IA3 0x00080000 -#define DBSR_IA4 0x00040000 -#define DBSR_MRR 0x00000300 +/* + * DBSR bits which have conflicting definitions on true Book E versus PPC40x + */ +#ifdef CONFIG_BOOKE +#define DBSR_IA1 0x00800000 /* Instr Address Compare 1 Event */ +#define DBSR_IA2 0x00400000 /* Instr Address Compare 2 Event */ +#define DBSR_IA3 0x00200000 /* Instr Address Compare 3 Event */ +#define DBSR_IA4 0x00100000 /* Instr Address Compare 4 Event */ +#endif +#ifndef CONFIG_440 +#define DBSR_IA1 0x04000000 /* Instr Address Compare 1 Event */ +#define DBSR_IA2 0x02000000 /* Instr Address Compare 2 Event */ +#define DBSR_IA3 0x00080000 /* Instr Address Compare 3 Event */ +#define DBSR_IA4 0x00040000 /* Instr Address Compare 4 Event */ +#endif struct spr_info { int spr_val; |