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authorRupjyoti Sarmah <rsarmah@appliedmicro.com>2010-03-24 16:52:02 +0530
committerStefan Roese <sr@denx.de>2010-03-24 14:27:01 +0100
commitc550afada5fcad426aa6a219a329feb9eedae8b2 (patch)
tree99a4b5a26fa904d1852b9662f9643add3ffa806e /include/asm-sh/cpu_sh7722.h
parent7027d5622d56ee2292713773044fb6352e431f31 (diff)
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ppc4xx fix unstable 440EPx bootstrap options
440EPx fixed bootstrap options A, B, D, and E sets PLL FWDVA to a value = 1. This results in the PLLOUTB being greater than the CPU clock frequency resulting unstable 440EPx operation resulting in various software hang conditions. This patch reprograms the FWDVA satisfying the requirement of setting FWDVB to a value greater than 1 while using one of the four deafult bootstrap options. Signed-off-by: Rupjyoti Sarmah <rsarmah@amcc.com> Acked-by : Victor Gallardo <vgallardo@appliedmicro.com> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/asm-sh/cpu_sh7722.h')
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