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| author | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2007-09-23 02:12:30 +0900 |
|---|---|---|
| committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2007-09-23 02:12:30 +0900 |
| commit | b02bad128669e567fce87d8df823b06a0144b8db (patch) | |
| tree | e388d06d722b283d09260ceab22f9cc342216f94 /include/asm-sh/cpu_sh4.h | |
| parent | b8685affe614ccf5f4ec66252b30e2e524d18948 (diff) | |
| download | u-boot-imx-b02bad128669e567fce87d8df823b06a0144b8db.zip u-boot-imx-b02bad128669e567fce87d8df823b06a0144b8db.tar.gz u-boot-imx-b02bad128669e567fce87d8df823b06a0144b8db.tar.bz2 | |
sh: Update core code of SuperH.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'include/asm-sh/cpu_sh4.h')
| -rw-r--r-- | include/asm-sh/cpu_sh4.h | 44 |
1 files changed, 41 insertions, 3 deletions
diff --git a/include/asm-sh/cpu_sh4.h b/include/asm-sh/cpu_sh4.h index e0275f3..dca61ca 100644 --- a/include/asm-sh/cpu_sh4.h +++ b/include/asm-sh/cpu_sh4.h @@ -1,10 +1,48 @@ +/* + * (C) Copyright 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + #ifndef _ASM_CPU_SH4_H_ #define _ASM_CPU_SH4_H_ + +/* cache control */ +#define CCR_CACHE_STOP 0x00000808 +#define CCR_CACHE_ENABLE 0x00000101 +#define CCR_CACHE_ICI 0x00000800 + +#define CACHE_OC_ADDRESS_ARRAY 0xf4000000 +#define CACHE_OC_WAY_SHIFT 14 +#define CACHE_OC_NUM_ENTRIES 512 +#define CACHE_OC_ENTRY_SHIFT 5 +//#define CACHE_OC_NUM_WAYS 1 + #if defined (CONFIG_CPU_SH7750) #include <asm/cpu_sh7750.h> -#elif defined (CONFIG_CPU_SH7780) -#include <asm/cpu_sh7780.h> +//#ifdef CONFIG_CPU_TYPE_R +//#define CCR_CACHE_INIT 0x8000090d /* EMODE,ICI,ICE(16k),OCI,P1-wb,OCE(32k) */ +//#else +//#define CCR_CACHE_INIT 0x0000090b +//#endif +#elif defined (CONFIG_CPU_SH7722) +#include <asm/cpu_sh7722.h> +//#define CCR_CACHE_INIT 0x0000090d #else #error "Unknown SH4 variant" #endif -#endif + +#endif /* _ASM_CPU_SH4_H_ */ |