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author | Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | 2007-12-03 22:58:45 +0900 |
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committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2008-01-15 23:30:40 +0900 |
commit | f9913a8ee71ff14fcfc1c7fd0e6912f897e69403 (patch) | |
tree | 5a087a498b2cee6245934b1258a4b65d4b35b549 /include/asm-sh/cpu_sh3.h | |
parent | 5dd372a23d12003276dddf7f9604154fd522ae73 (diff) | |
download | u-boot-imx-f9913a8ee71ff14fcfc1c7fd0e6912f897e69403.zip u-boot-imx-f9913a8ee71ff14fcfc1c7fd0e6912f897e69403.tar.gz u-boot-imx-f9913a8ee71ff14fcfc1c7fd0e6912f897e69403.tar.bz2 |
sh: Add support SH3 and SH7720
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'include/asm-sh/cpu_sh3.h')
-rw-r--r-- | include/asm-sh/cpu_sh3.h | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/include/asm-sh/cpu_sh3.h b/include/asm-sh/cpu_sh3.h new file mode 100644 index 0000000..68679c0 --- /dev/null +++ b/include/asm-sh/cpu_sh3.h @@ -0,0 +1,40 @@ +/* + * (C) Copyright 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> + * (C) Copyright 2007 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _ASM_CPU_SH3_H_ +#define _ASM_CPU_SH3_H_ + +/* cache control */ +#define CCR_CACHE_STOP 0x00000008 +#define CCR_CACHE_ENABLE 0x00000005 +#define CCR_CACHE_ICI 0x00000008 + +#define CACHE_OC_ADDRESS_ARRAY 0xf0000000 +#define CACHE_OC_WAY_SHIFT 13 +#define CACHE_OC_NUM_ENTRIES 256 +#define CACHE_OC_ENTRY_SHIFT 4 + +#if defined(CONFIG_CPU_SH7720) +#include <asm/cpu_sh7720.h> +#else +#error "Unknown SH3 variant" +#endif + +#endif /* _ASM_CPU_SH3_H_ */ |