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| author | Timur Tabi <timur@freescale.com> | 2008-04-04 11:15:58 -0500 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-04-18 17:43:09 -0500 |
| commit | 88353a985109562a639b2f8a0c90d77011bfe374 (patch) | |
| tree | a6c7c35746ed291c3a003eed91c2525619e03266 /include/asm-ppc | |
| parent | 5e3dca577b7c1bf58bd2b48449b18b7e7dcd8e04 (diff) | |
| download | u-boot-imx-88353a985109562a639b2f8a0c90d77011bfe374.zip u-boot-imx-88353a985109562a639b2f8a0c90d77011bfe374.tar.gz u-boot-imx-88353a985109562a639b2f8a0c90d77011bfe374.tar.bz2 | |
Fix calculation of I2C clock for some 85xx chips
Some 85xx chips use CCB as the base clock for the I2C. Some use CCB/2, and
some use CCB/3. There is no pattern that can be used to determine which
chips use which frequency, so the only way to determine is to look up the
actual SOC designation and use the right value for that SOC.
Update immap_85xx.h to include the GUTS PORDEVSR2 register.
Signed-off-by: Timur Tabi <timur@freescale.com>
Diffstat (limited to 'include/asm-ppc')
| -rw-r--r-- | include/asm-ppc/immap_85xx.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index 01cb2d7..dc6e278 100644 --- a/include/asm-ppc/immap_85xx.h +++ b/include/asm-ppc/immap_85xx.h @@ -1570,7 +1570,9 @@ typedef struct ccsr_gur { #define MPC85xx_PORDEVSR_RIO_CTLS 0x00000008 #define MPC85xx_PORDEVSR_RIO_DEV_ID 0x00000007 uint pordbgmsr; /* 0xe0010 - POR debug mode status register */ - char res1[12]; + uint pordevsr2; /* 0xe0014 - POR I/O device status regsiter 2 */ +#define MPC85xx_PORDEVSR2_SEC_CFG 0x00000020 + char res1[8]; uint gpporcr; /* 0xe0020 - General-purpose POR configuration register */ char res2[12]; uint gpiocr; /* 0xe0030 - GPIO control register */ |