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authorAdam Graham <agraham@amcc.com>2008-09-03 12:26:59 -0700
committerStefan Roese <sr@denx.de>2008-09-05 12:04:16 +0200
commitf6b6c45840f9b4671d2d97243a12a1f3ffb64765 (patch)
tree6a6ff862226277c87cbed68551ac10b9b12a98f9 /include/asm-ppc
parent075d0b81e896e8735ae26372cd384f87cbd24e41 (diff)
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ppc4xx: Update Kilauea to use PPC4xx DDR autocalibration routines
Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/asm-ppc')
-rw-r--r--include/asm-ppc/ppc4xx-sdram.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/asm-ppc/ppc4xx-sdram.h b/include/asm-ppc/ppc4xx-sdram.h
index 0174d62..a1ef029 100644
--- a/include/asm-ppc/ppc4xx-sdram.h
+++ b/include/asm-ppc/ppc4xx-sdram.h
@@ -29,6 +29,7 @@
/*
* SDRAM Controller
*/
+
/*
* XXX - ToDo: Revisit file to change all these lower case defines into
* upper case. Also needs to be done in the controller setup code too
@@ -256,6 +257,7 @@
#define SDRAM_DLYCAL_DLCV_ENCODE(x) (((x)<<2) & SDRAM_DLYCAL_DLCV_MASK)
#define SDRAM_DLYCAL_DLCV_DECODE(x) (((x) & SDRAM_DLYCAL_DLCV_MASK)>>2)
+#if !defined(CONFIG_405EX)
/*
* Memory queue defines
*/
@@ -293,7 +295,6 @@
#define SDRAM_PLBADDUHB (SDRAMQ_DCR_BASE+0x10) /* PLB base address upper 32 LL */
-#if !defined(CONFIG_405EX)
/*
* Memory Bank 0-7 configuration
*/