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authorBen Warren <biggerbadderben@gmail.com>2008-01-16 22:37:35 -0500
committerKim Phillips <kim.phillips@freescale.com>2008-01-17 11:02:25 -0600
commit04a9e1180ac76a7bacc15a6fcd95ad839d65bddb (patch)
tree200373a0d0d38d7f12a6b21ff52d4b1a49ca2d59 /include/asm-ppc
parenta8cb43a89be6cfd283257a603dd9841503ccce0f (diff)
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Add support for a Freescale non-CPM SPI controller
This patch adds support for the SPI controller found on Freescale PowerPC processors such as the MCP834x family. Additionally, a new config option, CONFIG_HARD_SPI, is added for general purpose SPI controller use. Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/asm-ppc')
-rw-r--r--include/asm-ppc/immap_83xx.h9
-rw-r--r--include/asm-ppc/mpc8xxx_spi.h49
2 files changed, 54 insertions, 4 deletions
diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h
index 34ea295..c16a098 100644
--- a/include/asm-ppc/immap_83xx.h
+++ b/include/asm-ppc/immap_83xx.h
@@ -30,6 +30,7 @@
#include <asm/types.h>
#include <asm/fsl_i2c.h>
+#include <asm/mpc8xxx_spi.h>
/*
* Local Access Window
@@ -627,7 +628,7 @@ typedef struct immap {
u8 res3[0x900];
lbus83xx_t lbus; /* Local Bus Controller Registers */
u8 res4[0x1000];
- spi83xx_t spi; /* Serial Peripheral Interface */
+ spi8xxx_t spi; /* Serial Peripheral Interface */
dma83xx_t dma; /* DMA */
pciconf83xx_t pci_conf[2]; /* PCI Software Configuration Registers */
ios83xx_t ios; /* Sequencer */
@@ -661,7 +662,7 @@ typedef struct immap {
u8 res2[0x900];
lbus83xx_t lbus; /* Local Bus Controller Registers */
u8 res3[0x1000];
- spi83xx_t spi; /* Serial Peripheral Interface */
+ spi8xxx_t spi; /* Serial Peripheral Interface */
dma83xx_t dma; /* DMA */
pciconf83xx_t pci_conf[1]; /* PCI Software Configuration Registers */
u8 res4[0x80];
@@ -696,7 +697,7 @@ typedef struct immap {
u8 res2[0x900];
lbus83xx_t lbus; /* Local Bus Controller Registers */
u8 res3[0x1000];
- spi83xx_t spi; /* Serial Peripheral Interface */
+ spi8xxx_t spi; /* Serial Peripheral Interface */
dma83xx_t dma; /* DMA */
pciconf83xx_t pci_conf[1]; /* PCI Software Configuration Registers */
u8 res4[0x80];
@@ -741,7 +742,7 @@ typedef struct immap {
u8 res2[0x900];
lbus83xx_t lbus; /* Local Bus Controller Registers */
u8 res3[0x1000];
- spi83xx_t spi; /* Serial Peripheral Interface */
+ spi8xxx_t spi; /* Serial Peripheral Interface */
dma83xx_t dma; /* DMA */
pciconf83xx_t pci_conf[1]; /* PCI Software Configuration Registers */
u8 res4[0x80];
diff --git a/include/asm-ppc/mpc8xxx_spi.h b/include/asm-ppc/mpc8xxx_spi.h
new file mode 100644
index 0000000..38f12b9
--- /dev/null
+++ b/include/asm-ppc/mpc8xxx_spi.h
@@ -0,0 +1,49 @@
+/*
+ * Freescale non-CPM SPI Controller
+ *
+ * Copyright 2008 Qstreams Networks, Inc.
+ *
+ * This software may be used and distributed according to the
+ * terms of the GNU Public License, Version 2, incorporated
+ * herein by reference.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * Version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _ASM_MPC8XXX_SPI_H_
+#define _ASM_MPC8XXX_SPI_H_
+
+#include <asm/types.h>
+
+#if defined(CONFIG_MPC834X) || \
+ defined(CONFIG_MPC8313) || \
+ defined(CONFIG_MPC8315) || \
+ defined(CONFIG_MPC837X)
+
+typedef struct spi8xxx
+{
+ u8 res0[0x20]; /* 0x0-0x01f reserved */
+ u32 mode; /* mode register */
+ u32 event; /* event register */
+ u32 mask; /* mask register */
+ u32 com; /* command register */
+ u32 tx; /* transmit register */
+ u32 rx; /* receive register */
+ u8 res1[0xC8]; /* fill up to 0x100 */
+} spi8xxx_t;
+
+#endif
+
+#endif /* _ASM_MPC8XXX_SPI_H_ */