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author | Wolfgang Denk <wd@denx.de> | 2009-08-31 22:21:47 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2009-08-31 22:21:47 +0200 |
commit | 3aa8b68d80dbcb6829af60485c1e388b39af793d (patch) | |
tree | b76a4e1624cfddceb5358d6221acd08a57c45b74 /include/asm-ppc | |
parent | 3d35d87d5482de23cd5dc4d7721b1086107cae50 (diff) | |
parent | 2d04db088e6df8a008bb09f604876a45031df93b (diff) | |
download | u-boot-imx-3aa8b68d80dbcb6829af60485c1e388b39af793d.zip u-boot-imx-3aa8b68d80dbcb6829af60485c1e388b39af793d.tar.gz u-boot-imx-3aa8b68d80dbcb6829af60485c1e388b39af793d.tar.bz2 |
Merge branch 'next' of ../next
Diffstat (limited to 'include/asm-ppc')
-rw-r--r-- | include/asm-ppc/config.h | 7 | ||||
-rw-r--r-- | include/asm-ppc/fsl_pci.h | 29 | ||||
-rw-r--r-- | include/asm-ppc/global_data.h | 3 | ||||
-rw-r--r-- | include/asm-ppc/immap_85xx.h | 5 | ||||
-rw-r--r-- | include/asm-ppc/processor.h | 11 |
5 files changed, 50 insertions, 5 deletions
diff --git a/include/asm-ppc/config.h b/include/asm-ppc/config.h index c9ba805..5670d06 100644 --- a/include/asm-ppc/config.h +++ b/include/asm-ppc/config.h @@ -38,4 +38,11 @@ #endif #endif +#if defined(CONFIG_MPC8572) || defined(CONFIG_P1020) || \ + defined(CONFIG_P2020) || defined(CONFIG_MPC8641) +#define CONFIG_MAX_CPUS 2 +#else +#define CONFIG_MAX_CPUS 1 +#endif + #endif /* _ASM_CONFIG_H_ */ diff --git a/include/asm-ppc/fsl_pci.h b/include/asm-ppc/fsl_pci.h index 624ca56..f625d19 100644 --- a/include/asm-ppc/fsl_pci.h +++ b/include/asm-ppc/fsl_pci.h @@ -20,8 +20,7 @@ #ifndef __FSL_PCI_H_ #define __FSL_PCI_H_ -int fsl_pci_setup_inbound_windows(struct pci_region *r); -void fsl_pci_init(struct pci_controller *hose); +void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data); void fsl_pci_config_unlock(struct pci_controller *hose); void ft_fsl_pci_setup(void *blob, const char *pci_alias, struct pci_controller *hose); @@ -155,4 +154,30 @@ typedef struct ccsr_pci { char res24[252]; } ccsr_fsl_pci_t; +struct fsl_pci_info { + unsigned long regs; + pci_addr_t mem_bus; + phys_size_t mem_phys; + pci_size_t mem_size; + pci_addr_t io_bus; + phys_size_t io_phys; + pci_size_t io_size; + int pci_num; +}; + +int fsl_pci_init_port(struct fsl_pci_info *pci_info, + struct pci_controller *hose, int busno); + +#define SET_STD_PCIE_INFO(x, num) \ +{ \ + x.regs = CONFIG_SYS_PCIE##num##_ADDR; \ + x.mem_bus = CONFIG_SYS_PCIE##num##_MEM_BUS; \ + x.mem_phys = CONFIG_SYS_PCIE##num##_MEM_PHYS; \ + x.mem_size = CONFIG_SYS_PCIE##num##_MEM_SIZE; \ + x.io_bus = CONFIG_SYS_PCIE##num##_IO_BUS; \ + x.io_phys = CONFIG_SYS_PCIE##num##_IO_PHYS; \ + x.io_size = CONFIG_SYS_PCIE##num##_IO_SIZE; \ + x.pci_num = num; \ +} + #endif diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h index 244c161..db4b1ea 100644 --- a/include/asm-ppc/global_data.h +++ b/include/asm-ppc/global_data.h @@ -86,11 +86,12 @@ typedef struct global_data { u32 mem_sec_clk; #endif /* CONFIG_MPC8360 */ #endif -#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8536) +#if defined(CONFIG_FSL_ESDHC) u32 sdhc_clk; #endif #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) u32 lbc_clk; + void *cpu; #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) u32 i2c1_clk; diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index 0efef05..375d804 100644 --- a/include/asm-ppc/immap_85xx.h +++ b/include/asm-ppc/immap_85xx.h @@ -411,6 +411,11 @@ typedef struct ccsr_l2cache { char res15[420]; } ccsr_l2cache_t; +#define MPC85xx_L2CTL_L2E 0x80000000 +#define MPC85xx_L2CTL_L2SRAM_ENTIRE 0x00010000 +#define MPC85xx_L2ERRDIS_MBECC 0x00000008 +#define MPC85xx_L2ERRDIS_SBECC 0x00000004 + /* * DMA Registers(0x2_1000-0x2_2000) */ diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 2841104..dcaf8c0 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -1009,6 +1009,12 @@ #define SVR_8569_E 0x808800 #define SVR_8572 0x80E000 #define SVR_8572_E 0x80E800 +#define SVR_P1011 0x80E500 +#define SVR_P1011_E 0x80ED00 +#define SVR_P1020 0x80E400 +#define SVR_P1020_E 0x80EC00 +#define SVR_P2010 0x80E300 +#define SVR_P2010_E 0x80EB00 #define SVR_P2020 0x80E200 #define SVR_P2020_E 0x80EA00 @@ -1065,13 +1071,14 @@ n: struct cpu_type { char name[15]; u32 soc_ver; + u32 num_cores; }; struct cpu_type *identify_cpu(u32 ver); #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) -#define CPU_TYPE_ENTRY(n, v) \ - { .name = #n, .soc_ver = SVR_##v, } +#define CPU_TYPE_ENTRY(n, v, nc) \ + { .name = #n, .soc_ver = SVR_##v, .num_cores = (nc), } #else #if defined(CONFIG_MPC83xx) #define CPU_TYPE_ENTRY(x) {#x, SPR_##x} |