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author | Wolfgang Denk <wd@denx.de> | 2009-07-23 00:52:30 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2009-07-23 00:52:30 +0200 |
commit | 05c37340183ff097b29d66e8d7862fc21162bc6e (patch) | |
tree | 0c2c940665a7333620c668855524536672eb46cf /include/asm-ppc | |
parent | 48677a1ef5f82adca49145a7baf11ece77f51945 (diff) | |
parent | 5a625149dbe14d381df454c459c6aaf27d59af20 (diff) | |
download | u-boot-imx-05c37340183ff097b29d66e8d7862fc21162bc6e.zip u-boot-imx-05c37340183ff097b29d66e8d7862fc21162bc6e.tar.gz u-boot-imx-05c37340183ff097b29d66e8d7862fc21162bc6e.tar.bz2 |
Merge branch 'master' of /home/wd/git/u-boot/custodians
Diffstat (limited to 'include/asm-ppc')
-rw-r--r-- | include/asm-ppc/immap_86xx.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h index a839834..fdfc654 100644 --- a/include/asm-ppc/immap_86xx.h +++ b/include/asm-ppc/immap_86xx.h @@ -114,9 +114,9 @@ typedef struct ccsr_ddr { uint timing_cfg_0; /* 0x2104 - DDR SDRAM Timing Configuration Register 0 */ uint timing_cfg_1; /* 0x2108 - DDR SDRAM Timing Configuration Register 1 */ uint timing_cfg_2; /* 0x210c - DDR SDRAM Timing Configuration Register 2 */ - uint sdram_cfg_1; /* 0x2110 - DDR SDRAM Control Configuration 1 */ + uint sdram_cfg; /* 0x2110 - DDR SDRAM Control Configuration 1 */ uint sdram_cfg_2; /* 0x2114 - DDR SDRAM Control Configuration 2 */ - uint sdram_mode_1; /* 0x2118 - DDR SDRAM Mode Configuration 1 */ + uint sdram_mode; /* 0x2118 - DDR SDRAM Mode Configuration 1 */ uint sdram_mode_2; /* 0x211c - DDR SDRAM Mode Configuration 2 */ uint sdram_mode_cntl; /* 0x2120 - DDR SDRAM Mode Control */ uint sdram_interval; /* 0x2124 - DDR SDRAM Interval Configuration */ |