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| author | Grant Erickson <gerickson@nuovations.com> | 2008-05-22 14:44:14 -0700 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-06-03 20:20:50 +0200 |
| commit | c821b5f120bedf73867513466412587c6912a8f8 (patch) | |
| tree | 4aea7e5a0a20c42580cfdb3db79d071bea9e95fe /include/asm-ppc | |
| parent | a439680019e06171d4a5694b7992accce87f590e (diff) | |
| download | u-boot-imx-c821b5f120bedf73867513466412587c6912a8f8.zip u-boot-imx-c821b5f120bedf73867513466412587c6912a8f8.tar.gz u-boot-imx-c821b5f120bedf73867513466412587c6912a8f8.tar.bz2 | |
ppc4xx: Enable Primordial Stack for 40x and Unify ECC Handling
This patch (Part 1 of 2):
* Rolls up a suite of changes to enable correct primordial stack and
global data handling when the data cache is used for such a purpose
for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS).
* Related to the first, unifies DDR2 SDRAM and ECC initialization by
eliminating redundant ECC initialization implementations and moving
redundant SDRAM initialization out of board code into shared 4xx
code.
* Enables MCSR visibility on the 405EX(r).
* Enables the use of the data cache for initial RAM on
both AMCC's Kilauea and Makalu and removes a redundant
CFG_POST_MEMORY flag from each board's CONFIG_POST value.
- Removed, per Stefan Roese's request, defunct memory.c file for
Makalu and rolled sdram_init from it into makalu.c.
With respect to the 4xx DDR initialization and ECC unification, there
is certainly more work that can and should be done (file renaming,
etc.). However, that can be handled at a later date on a second or
third pass. As it stands, this patch moves things forward in an
incremental yet positive way for those platforms that utilize this
code and the features associated with it.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/asm-ppc')
| -rw-r--r-- | include/asm-ppc/processor.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 8bdfb9d..cfd8440 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -460,17 +460,19 @@ #define SPRN_PID2 0x27a /* Process ID Register 2 */ #define SPRN_MCSR 0x23c /* Machine Check Syndrome register */ #define SPRN_MCAR 0x23d /* Machine Check Address register */ -#ifdef CONFIG_440 #define MCSR_MCS 0x80000000 /* Machine Check Summary */ #define MCSR_IB 0x40000000 /* Instruction PLB Error */ +#if defined(CONFIG_440) #define MCSR_DRB 0x20000000 /* Data Read PLB Error */ #define MCSR_DWB 0x10000000 /* Data Write PLB Error */ +#else +#define MCSR_DB 0x20000000 /* Data PLB Error */ +#endif /* defined(CONFIG_440) */ #define MCSR_TLBP 0x08000000 /* TLB Parity Error */ #define MCSR_ICP 0x04000000 /* I-Cache Parity Error */ #define MCSR_DCSP 0x02000000 /* D-Cache Search Parity Error */ #define MCSR_DCFP 0x01000000 /* D-Cache Flush Parity Error */ #define MCSR_IMPE 0x00800000 /* Imprecise Machine Check Exception */ -#endif #define ESR_ST 0x00800000 /* Store Operation */ #if defined(CONFIG_MPC86xx) |