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| author | Stefan Roese <sr@denx.de> | 2007-10-31 17:55:58 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-10-31 21:21:46 +0100 |
| commit | 9b94ac61d2176185c30adf0793e079ec30e68687 (patch) | |
| tree | f51a4467a3daffa8b5597eb9d783c944692f7d80 /include/asm-ppc | |
| parent | 06713773da4ac3d390c63d82641eb553224b27c2 (diff) | |
| download | u-boot-imx-9b94ac61d2176185c30adf0793e079ec30e68687.zip u-boot-imx-9b94ac61d2176185c30adf0793e079ec30e68687.tar.gz u-boot-imx-9b94ac61d2176185c30adf0793e079ec30e68687.tar.bz2 | |
ppc4xx: Rework 4xx cache support
New cache handling functions added and all existing functions
moved from start.S into seperate cache.S.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/asm-ppc')
| -rw-r--r-- | include/asm-ppc/cache.h | 21 |
1 files changed, 16 insertions, 5 deletions
diff --git a/include/asm-ppc/cache.h b/include/asm-ppc/cache.h index 5befab4..e29bfc2 100644 --- a/include/asm-ppc/cache.h +++ b/include/asm-ppc/cache.h @@ -8,15 +8,24 @@ #include <asm/processor.h> /* bytes per L1 cache line */ -#if !defined(CONFIG_8xx) || defined(CONFIG_8260) +#if !(defined(CONFIG_8xx) || defined(CONFIG_IOP480)) #if defined(CONFIG_PPC64BRIDGE) -#define L1_CACHE_BYTES 128 +#define L1_CACHE_SHIFT 7 #else -#define L1_CACHE_BYTES 32 +#define L1_CACHE_SHIFT 5 #endif /* PPC64 */ #else -#define L1_CACHE_BYTES 16 -#endif /* !8xx || 8260 */ +#define L1_CACHE_SHIFT 4 +#endif /* !(8xx || IOP480) */ + +#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) + +/* + * For compatibility reasons support the CFG_CACHELINE_SIZE too + */ +#ifndef CFG_CACHELINE_SIZE +#define CFG_CACHELINE_SIZE L1_CACHE_BYTES +#endif #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) #define L1_CACHE_PAGES 8 @@ -35,6 +44,8 @@ extern void flush_dcache_range(unsigned long start, unsigned long stop); extern void clean_dcache_range(unsigned long start, unsigned long stop); extern void invalidate_dcache_range(unsigned long start, unsigned long stop); +extern void flush_dcache(void); +extern void invalidate_dcache(void); #ifdef CFG_INIT_RAM_LOCK extern void unlock_ram_in_cache(void); #endif /* CFG_INIT_RAM_LOCK */ |