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| author | Ben Warren <bwarren@qstreams.com> | 2006-09-07 16:51:04 -0400 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2006-11-03 19:42:19 -0600 |
| commit | b24f119d672b709d153ff2ac091d4aa63ec6877d (patch) | |
| tree | fd336614e7e0b3363512be41e501b6e9d6a5331a /include/asm-ppc | |
| parent | bb99ad6d8257bf828f150d40f507b30d80a4a7ae (diff) | |
| download | u-boot-imx-b24f119d672b709d153ff2ac091d4aa63ec6877d.zip u-boot-imx-b24f119d672b709d153ff2ac091d4aa63ec6877d.tar.gz u-boot-imx-b24f119d672b709d153ff2ac091d4aa63ec6877d.tar.bz2 | |
Multi-bus I2C implementation of MPC834x
Hello,
Attached is a patch implementing multiple I2C buses on the MPC834x CPU
family and the MPC8349EMDS board in particular.
This patch requires Patch 1 (Add support for multiple I2C buses).
Testing was performed on a 533MHz board.
/*** Note: This patch replaces ticket DNX#2006083042000027 ***/
Signed-off-by: Ben Warren <bwarren@qstreams.com>
CHANGELOG:
Implemented driver-level code to support two I2C buses on the
MPC834x CPU family and the MPC8349EMDS board. Available I2C bus speeds
are 50kHz, 100kHz and 400kHz on each bus.
regards,
Ben
Diffstat (limited to 'include/asm-ppc')
| -rw-r--r-- | include/asm-ppc/i2c.h | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/include/asm-ppc/i2c.h b/include/asm-ppc/i2c.h index 2ae3367..baf9d9a 100644 --- a/include/asm-ppc/i2c.h +++ b/include/asm-ppc/i2c.h @@ -79,6 +79,12 @@ typedef struct i2c #endif #define I2C_TIMEOUT (CFG_HZ/4) +enum I2C_BUS_NUM +{ + I2C_BUS_1 = 0, + I2C_BUS_2, +}; + #ifndef CFG_IMMRBAR #error CFG_IMMRBAR is not defined in /include/configs/${BOARD}.h #endif @@ -87,15 +93,12 @@ typedef struct i2c #error CFG_I2C_OFFSET is not defined in /include/configs/${BOARD}.h #endif -#if defined(CONFIG_MPC8349EMDS) || defined(CONFIG_TQM834X) -/* - * MPC8349 have two i2c bus - */ -extern i2c_t * mpc83xx_i2c; -#define I2C mpc83xx_i2c -#else -#define I2C ((i2c_t*)(CFG_IMMRBAR + CFG_I2C_OFFSET)) -#endif +#define I2C_1 ((i2c_t*)(CFG_IMMRBAR + CFG_I2C_OFFSET)) + +/* Optional support for second I2C bus */ +#ifdef CFG_I2C2_OFFSET +#define I2C_2 ((i2c_t*)(CFG_IMMRBAR + CFG_I2C2_OFFSET)) +#endif /* CFG_I2C2_OFFSET */ #define I2C_READ 1 #define I2C_WRITE 0 |