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author | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-12-13 12:56:31 +0100 |
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committer | Stefan Roese <sr@denx.de> | 2007-12-13 13:15:04 +0100 |
commit | 812711ce6b3a386125dcf0d6a59588e461abbb87 (patch) | |
tree | 7aa549af060b380507eb6da479a11ac63fb34968 /include/asm-ppc | |
parent | be60a9021c82fc5aecd5b2b1fc96f70a9c81bbcd (diff) | |
download | u-boot-imx-812711ce6b3a386125dcf0d6a59588e461abbb87.zip u-boot-imx-812711ce6b3a386125dcf0d6a59588e461abbb87.tar.gz u-boot-imx-812711ce6b3a386125dcf0d6a59588e461abbb87.tar.bz2 |
Implement __raw_{read,write}[bwl] on all architectures
This adds implementations of __raw_read[bwl] and __raw_write[bwl] to
m68k, ppc, nios and nios2. The m68k and ppc implementations were taken
from Linux.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Diffstat (limited to 'include/asm-ppc')
-rw-r--r-- | include/asm-ppc/io.h | 32 |
1 files changed, 31 insertions, 1 deletions
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h index 11dfa1c..86fe8dc 100644 --- a/include/asm-ppc/io.h +++ b/include/asm-ppc/io.h @@ -121,13 +121,43 @@ static inline void isync(void) #define iobarrier_w() eieio() /* + * Non ordered and non-swapping "raw" accessors + */ +#define __iomem +#define PCI_FIX_ADDR(addr) (addr) + +static inline unsigned char __raw_readb(const volatile void __iomem *addr) +{ + return *(volatile unsigned char *)PCI_FIX_ADDR(addr); +} +static inline unsigned short __raw_readw(const volatile void __iomem *addr) +{ + return *(volatile unsigned short *)PCI_FIX_ADDR(addr); +} +static inline unsigned int __raw_readl(const volatile void __iomem *addr) +{ + return *(volatile unsigned int *)PCI_FIX_ADDR(addr); +} +static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr) +{ + *(volatile unsigned char *)PCI_FIX_ADDR(addr) = v; +} +static inline void __raw_writew(unsigned short v, volatile void __iomem *addr) +{ + *(volatile unsigned short *)PCI_FIX_ADDR(addr) = v; +} +static inline void __raw_writel(unsigned int v, volatile void __iomem *addr) +{ + *(volatile unsigned int *)PCI_FIX_ADDR(addr) = v; +} + +/* * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. * * Read operations have additional twi & isync to make sure the read * is actually performed (i.e. the data has come back) before we start * executing any following instructions. */ -#define __iomem extern inline int in_8(const volatile unsigned char __iomem *addr) { int ret; |