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author | wdenk <wdenk> | 2000-11-20 17:21:10 +0000 |
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committer | wdenk <wdenk> | 2000-11-20 17:21:10 +0000 |
commit | 4248acf640a74762cd0c5376a1fd9f1a3a0f87ac (patch) | |
tree | 0346c0a9645316b29d6699b01f35512121ff279d /include/asm-ppc | |
parent | 0f89ba4320c42f9df753c7c5527aed1d8eaeca93 (diff) | |
download | u-boot-imx-4248acf640a74762cd0c5376a1fd9f1a3a0f87ac.zip u-boot-imx-4248acf640a74762cd0c5376a1fd9f1a3a0f87ac.tar.gz u-boot-imx-4248acf640a74762cd0c5376a1fd9f1a3a0f87ac.tar.bz2 |
Initial revision
Diffstat (limited to 'include/asm-ppc')
-rw-r--r-- | include/asm-ppc/mc146818rtc.h | 27 | ||||
-rw-r--r-- | include/asm-ppc/pci_io.h | 43 |
2 files changed, 70 insertions, 0 deletions
diff --git a/include/asm-ppc/mc146818rtc.h b/include/asm-ppc/mc146818rtc.h new file mode 100644 index 0000000..5f806c4 --- /dev/null +++ b/include/asm-ppc/mc146818rtc.h @@ -0,0 +1,27 @@ +/* + * Machine dependent access functions for RTC registers. + */ +#ifndef __ASM_PPC_MC146818RTC_H +#define __ASM_PPC_MC146818RTC_H + +#include <asm/io.h> + +#ifndef RTC_PORT +#define RTC_PORT(x) (0x70 + (x)) +#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ +#endif + +/* + * The yet supported machines all access the RTC index register via + * an ISA port access but the way to access the date register differs ... + */ +#define CMOS_READ(addr) ({ \ +outb_p((addr),RTC_PORT(0)); \ +inb_p(RTC_PORT(1)); \ +}) +#define CMOS_WRITE(val, addr) ({ \ +outb_p((addr),RTC_PORT(0)); \ +outb_p((val),RTC_PORT(1)); \ +}) + +#endif /* __ASM_PPC_MC146818RTC_H */ diff --git a/include/asm-ppc/pci_io.h b/include/asm-ppc/pci_io.h new file mode 100644 index 0000000..0f57b53 --- /dev/null +++ b/include/asm-ppc/pci_io.h @@ -0,0 +1,43 @@ +/* originally from linux source (asm-ppc/io.h). + * Sanity added by Rob Taylor, Flying Pig Systems, 2000 + */ +#ifndef _PCI_IO_H_ +#define _PCI_IO_H_ + +#include "io.h" + + +#define pci_read_le16(addr, dest) \ + __asm__ __volatile__("lhbrx %0,0,%1" : "=r" (dest) : \ + "r" (addr), "m" (*addr)); + +#define pci_write_le16(addr, val) \ + __asm__ __volatile__("sthbrx %1,0,%2" : "=m" (*addr) : \ + "r" (val), "r" (addr)); + + +#define pci_read_le32(addr, dest) \ + __asm__ __volatile__("lwbrx %0,0,%1" : "=r" (dest) : \ + "r" (addr), "m" (*addr)); + +#define pci_write_le32(addr, val) \ +__asm__ __volatile__("stwbrx %1,0,%2" : "=m" (*addr) : \ + "r" (val), "r" (addr)); + +#define pci_readb(addr,b) ((b) = *(volatile u8 *) (addr)) +#define pci_writeb(b,addr) ((*(volatile u8 *) (addr)) = (b)) + +#if !defined(__BIG_ENDIAN) +#define pci_readw(addr,b) ((b) = *(volatile u16 *) (addr)) +#define pci_readl(addr,b) ((b) = *(volatile u32 *) (addr)) +#define pci_writew(b,addr) ((*(volatile u16 *) (addr)) = (b)) +#define pci_writel(b,addr) ((*(volatile u32 *) (addr)) = (b)) +#else +#define pci_readw(addr,b) pci_read_le16((volatile u16 *)(addr),(b)) +#define pci_readl(addr,b) pci_read_le32((volatile u32 *)(addr),(b)) +#define pci_writew(b,addr) pci_write_le16((volatile u16 *)(addr),(b)) +#define pci_writel(b,addr) pci_write_le32((volatile u32 *)(addr),(b)) +#endif + + +#endif /* _PCI_IO_H_ */ |