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| author | Kumar Gala <galak@kernel.crashing.org> | 2007-12-19 01:18:15 -0600 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-01-09 16:25:03 -0600 |
| commit | 2146cf56821c3364786ca94a7306008c5824b238 (patch) | |
| tree | 428acd2d62caa2aad074a5ac37c33817835cfb8a /include/asm-ppc | |
| parent | 1d47273d46925929f8f2c1913cd96d7257aade88 (diff) | |
| download | u-boot-imx-2146cf56821c3364786ca94a7306008c5824b238.zip u-boot-imx-2146cf56821c3364786ca94a7306008c5824b238.tar.gz u-boot-imx-2146cf56821c3364786ca94a7306008c5824b238.tar.bz2 | |
Reworked FSL Book-E TLB macros to be more readable
The old macros made it difficult to know what WIMGE and perm bits
were set for a TLB entry. Actually use the bit masks for these items
since they are only a single bit.
Also moved the macros into mmu.h out of e500.h since they aren't specific
to e500.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/asm-ppc')
| -rw-r--r-- | include/asm-ppc/mmu.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h index fed4fd6..45a4764 100644 --- a/include/asm-ppc/mmu.h +++ b/include/asm-ppc/mmu.h @@ -388,6 +388,19 @@ extern int write_bat(ppc_bat_t bat, unsigned long upper, unsigned long lower); #define MAS7_RPN 0xFFFFFFFF +#define FSL_BOOKE_MAS0(tlbsel,esel,nv) \ + (MAS0_TLBSEL(tlbsel) | MAS0_ESEL(esel) | MAS0_NV(nv)) +#define FSL_BOOKE_MAS1(v,iprot,tid,ts,tsize) \ + ((((v) << 31) & MAS1_VALID) |\ + (((iprot) << 30) & MAS1_IPROT) |\ + (MAS1_TID(tid)) |\ + (((ts) << 12) & MAS1_TS) |\ + (MAS1_TSIZE(tsize))) +#define FSL_BOOKE_MAS2(epn, wimge) \ + (((epn) & MAS3_RPN) | (wimge)) +#define FSL_BOOKE_MAS3(rpn, user, perms) \ + (((rpn) & MAS3_RPN) | (user) | (perms)) + #define BOOKE_PAGESZ_1K 0 #define BOOKE_PAGESZ_4K 1 #define BOOKE_PAGESZ_16K 2 |