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authorwdenk <wdenk>2004-06-09 00:51:50 +0000
committerwdenk <wdenk>2004-06-09 00:51:50 +0000
commit547b4cb25e585e154b5e84e33df3d157f786e305 (patch)
tree0f8b4f57d11a49c9b73b825fb9ad05c562c0dc05 /include/asm-ppc
parent97d80fc3912e517ee40e269abf534a006025da5c (diff)
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Patches by Jon Loeliger, 11 May 2004:
(partially, as they contained a lot of crap)
Diffstat (limited to 'include/asm-ppc')
-rw-r--r--include/asm-ppc/immap_85xx.h10
-rw-r--r--include/asm-ppc/u-boot.h5
2 files changed, 11 insertions, 4 deletions
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 6151089..5db0f66 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -89,7 +89,13 @@ typedef struct ccsr_ddr {
uint sdram_mode; /* 0x2118 - DDR SDRAM Mode Configuration */
char res7[8];
uint sdram_interval; /* 0x2124 - DDR SDRAM Interval Configuration */
+#ifdef MPC85xx_DDR_SDRAM_CLK_CNTL
+ char res7_5[8];
+ uint sdram_clk_cntl; /* 0x2130 - DDR SDRAM Clock Control */
+ char res8[3276];
+#else
char res8[3288];
+#endif
uint data_err_inject_hi; /* 0x2e00 - DDR Memory Data Path Error Injection Mask High */
uint data_err_inject_lo; /* 0x2e04 - DDR Memory Data Path Error Injection Mask Low */
uint ecc_err_inject; /* 0x2e08 - DDR Memory Data Path Error Injection Mask ECC */
@@ -150,7 +156,7 @@ typedef struct ccsr_i2c {
char res6[4075];
} ccsr_i2c_t;
-#ifdef CONFIG_MPC8540
+#if defined (CONFIG_MPC8540) || defined (CONFIG_MPC8555)
/* DUART Registers(0x4000-0x5000) */
typedef struct ccsr_duart {
char res1[1280];
@@ -1015,7 +1021,7 @@ typedef struct ccsr_pic {
} ccsr_pic_t;
/* CPM Block(0x8_0000-0xc_0000) */
-#ifdef CONFIG_MPC8540
+#if defined (CONFIG_MPC8540) || defined (CONFIG_MPC8555)
typedef struct ccsr_cpm {
char res[262144];
} ccsr_cpm_t;
diff --git a/include/asm-ppc/u-boot.h b/include/asm-ppc/u-boot.h
index 8141222..21d28c8 100644
--- a/include/asm-ppc/u-boot.h
+++ b/include/asm-ppc/u-boot.h
@@ -83,14 +83,15 @@ typedef struct bd_info {
defined(CONFIG_SXNI855T) || \
defined(CONFIG_SVM_SC8xx) || \
defined(CONFIG_MPC8540ADS) || \
- defined(CONFIG_MPC8560ADS) || \
+ defined(CONFIG_MPC8555CDS) || \
+ defined(CONFIG_MPC8560ADS) || \
defined(CONFIG_440_GX)
/* second onboard ethernet port */
unsigned char bi_enet1addr[6];
#endif
#if defined(CFG_GT_6426x) || defined(CONFIG_SVM_SC8xx) || \
defined(CONFIG_MPC8540ADS) || defined(CONFIG_MPC8560ADS) || \
- defined(CONFIG_440_GX)
+ defined(CONFIG_MPC8555CDS) || defined(CONFIG_440_GX)
/* third onboard ethernet port */
unsigned char bi_enet2addr[6];
#endif