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| author | Jon Loeliger <jdl@freescale.com> | 2007-08-02 14:42:20 -0500 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2007-08-10 11:02:32 -0500 |
| commit | cfc7a7f5bb3273c9951173c788001d45118f141f (patch) | |
| tree | f321b9a57ce6d32567df53a53f9d97bbc9ee9665 /include/asm-ppc/processor.h | |
| parent | 99c2fdab91bc633e46fb41dbaa629f87ccf6e00f (diff) | |
| download | u-boot-imx-cfc7a7f5bb3273c9951173c788001d45118f141f.zip u-boot-imx-cfc7a7f5bb3273c9951173c788001d45118f141f.tar.gz u-boot-imx-cfc7a7f5bb3273c9951173c788001d45118f141f.tar.bz2 | |
cpu/86xx fixes.
Remove rev 1 fixes.
Always set PICGCR_MODE.
Enable machine check and provide board config option
to set and handle SoC error interrupts.
Include MSSSR0 in error message.
Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Diffstat (limited to 'include/asm-ppc/processor.h')
| -rw-r--r-- | include/asm-ppc/processor.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 71e2e84..b806cc0 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -464,7 +464,8 @@ #define ESR_ST 0x00800000 /* Store Operation */ #if defined(CONFIG_MPC86xx) -#define SPRN_MSSCRO 0x3f6 +#define SPRN_MSSCR0 0x3f6 +#define SPRN_MSSSR0 0x3f7 #endif |