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author | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
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committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
commit | cb5473205206c7f14cbb1e747f28ec75b48826e2 (patch) | |
tree | 8f4808d60917100b18a10b05230f7638a0a9bbcc /include/asm-ppc/ppc4xx-ebc.h | |
parent | baf449fc5ff96f071bb0e3789fd3265f6d4fd9a0 (diff) | |
parent | 92c78a3bbcb2ce508b4bf1c4a1e0940406a024bb (diff) | |
download | u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.zip u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.gz u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.bz2 |
Merge branch 'fixes' into cleanups
Conflicts:
board/atmel/atngw100/atngw100.c
board/atmel/atstk1000/atstk1000.c
cpu/at32ap/at32ap700x/gpio.c
include/asm-avr32/arch-at32ap700x/clk.h
include/configs/atngw100.h
include/configs/atstk1002.h
include/configs/atstk1003.h
include/configs/atstk1004.h
include/configs/atstk1006.h
include/configs/favr-32-ezkit.h
include/configs/hammerhead.h
include/configs/mimc200.h
Diffstat (limited to 'include/asm-ppc/ppc4xx-ebc.h')
-rw-r--r-- | include/asm-ppc/ppc4xx-ebc.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/include/asm-ppc/ppc4xx-ebc.h b/include/asm-ppc/ppc4xx-ebc.h index d180e04..9680f70 100644 --- a/include/asm-ppc/ppc4xx-ebc.h +++ b/include/asm-ppc/ppc4xx-ebc.h @@ -35,7 +35,38 @@ #define CONFIG_EBC_PPC4xx_IBM_VER1 #endif +/* + * Define the max number of EBC banks (chip selects) + */ +#if defined(CONFIG_405CR) || defined(CONFIG_405GP) || \ + defined(CONFIG_405EZ) || \ + defined(CONFIG_440GP) || defined(CONFIG_440GX) +#define EBC_NUM_BANKS 8 +#endif + +#if defined(CONFIG_405EP) +#define EBC_NUM_BANKS 5 +#endif + +#if defined(CONFIG_405EX) || \ + defined(CONFIG_460SX) +#define EBC_NUM_BANKS 4 +#endif + +#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ + defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ + defined(CONFIG_460EX) || defined(CONFIG_460GT) +#define EBC_NUM_BANKS 6 +#endif + +#if defined(CONFIG_440SP) || defined(CONFIG_440SPE) +#define EBC_NUM_BANKS 3 +#endif + /* Bank Configuration Register */ +#define EBC_BXCR(n) (n) +#define EBC_BXCR_BANK_SIZE(n) (0x100000 << (((n) & EBC_BXCR_BS_MASK) >> 17)) + #define EBC_BXCR_BAS_MASK PPC_REG_VAL(11, 0xFFF) #define EBC_BXCR_BAS_ENCODE(n) (((static_cast(u32, n)) & EBC_BXCR_BAS_MASK)) #define EBC_BXCR_BS_MASK PPC_REG_VAL(14, 0x7) |