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authorJon Loeliger <jdl@freescale.com>2006-04-26 17:58:56 -0500
committerJon Loeliger <jdl@freescale.com>2006-04-26 17:58:56 -0500
commitdebb7354d1ea4f694154818df5e5b523f5c1cc1d (patch)
tree3756d8c53914f5c728a7b4da2886243fd22c9bd7 /include/asm-ppc/mmu.h
parent76544f80e476a7a0cc3a0bbce853354f2c6a61e2 (diff)
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Initial support for MPC8641 HPCN board.
Diffstat (limited to 'include/asm-ppc/mmu.h')
-rw-r--r--include/asm-ppc/mmu.h15
1 files changed, 14 insertions, 1 deletions
diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h
index 2606b79..612b5df 100644
--- a/include/asm-ppc/mmu.h
+++ b/include/asm-ppc/mmu.h
@@ -434,19 +434,28 @@ extern int write_bat(ppc_bat_t bat, unsigned long upper, unsigned long lower);
#define BOOKE_PAGESZ_1GB 10
#define BOOKE_PAGESZ_4GB 11
+#if defined(CONFIG_MPC86xx)
+#define LAWBAR_BASE_ADDR 0x00FFFFFF
+#define LAWAR_TRGT_IF 0x01F00000
+#else
#define LAWBAR_BASE_ADDR 0x000FFFFF
-#define LAWAR_EN 0x80000000
#define LAWAR_TRGT_IF 0x00F00000
+#endif
+#define LAWAR_EN 0x80000000
#define LAWAR_SIZE 0x0000003F
#define LAWAR_TRGT_IF_PCI 0x00000000
#define LAWAR_TRGT_IF_PCI1 0x00000000
#define LAWAR_TRGT_IF_PCIX 0x00000000
#define LAWAR_TRGT_IF_PCI2 0x00100000
+#define LAWAR_TRGT_IF_HT 0x00200000
#define LAWAR_TRGT_IF_LBC 0x00400000
#define LAWAR_TRGT_IF_CCSR 0x00800000
+#define LAWAR_TRGT_IF_DDR_INTERLEAVED 0x00B00000
#define LAWAR_TRGT_IF_RIO 0x00c00000
#define LAWAR_TRGT_IF_DDR 0x00f00000
+#define LAWAR_TRGT_IF_DDR1 0x00f00000
+#define LAWAR_TRGT_IF_DDR2 0x01600000
#define LAWAR_SIZE_BASE 0xa
#define LAWAR_SIZE_4K (LAWAR_SIZE_BASE+1)
@@ -469,5 +478,9 @@ extern int write_bat(ppc_bat_t bat, unsigned long upper, unsigned long lower);
#define LAWAR_SIZE_512M (LAWAR_SIZE_BASE+18)
#define LAWAR_SIZE_1G (LAWAR_SIZE_BASE+19)
#define LAWAR_SIZE_2G (LAWAR_SIZE_BASE+20)
+#define LAWAR_SIZE_4G (LAWAR_SIZE_BASE+21)
+#define LAWAR_SIZE_8G (LAWAR_SIZE_BASE+22)
+#define LAWAR_SIZE_16G (LAWAR_SIZE_BASE+23)
+#define LAWAR_SIZE_32G (LAWAR_SIZE_BASE+24)
#endif /* _PPC_MMU_H_ */