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| author | Jon Loeliger <jdl@freescale.com> | 2006-08-09 13:36:54 -0500 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2006-08-09 13:36:54 -0500 |
| commit | 281f69ede28cd3d8be5d62a96b5a0b73e6065858 (patch) | |
| tree | 8f1a0f42ce7d9c66d0ff2ecf93c9b069cbc68cc0 /include/asm-ppc/mmu.h | |
| parent | 870cbeaa45ccdbd6566882741da9f82433bd4a86 (diff) | |
| parent | 6587f7e1e98bfcb7910a47bae2eb51e9a5fbd4da (diff) | |
| download | u-boot-imx-281f69ede28cd3d8be5d62a96b5a0b73e6065858.zip u-boot-imx-281f69ede28cd3d8be5d62a96b5a0b73e6065858.tar.gz u-boot-imx-281f69ede28cd3d8be5d62a96b5a0b73e6065858.tar.bz2 | |
Merge branch 'wd'
Diffstat (limited to 'include/asm-ppc/mmu.h')
| -rw-r--r-- | include/asm-ppc/mmu.h | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h index 612b5df..11de3b0 100644 --- a/include/asm-ppc/mmu.h +++ b/include/asm-ppc/mmu.h @@ -483,4 +483,45 @@ extern int write_bat(ppc_bat_t bat, unsigned long upper, unsigned long lower); #define LAWAR_SIZE_16G (LAWAR_SIZE_BASE+23) #define LAWAR_SIZE_32G (LAWAR_SIZE_BASE+24) +#ifdef CONFIG_440SPE +/*----------------------------------------------------------------------------+ +| Following instructions are not available in Book E mode of the GNU assembler. ++----------------------------------------------------------------------------*/ +#define DCCCI(ra,rb) .long 0x7c000000|\ + (ra<<16)|(rb<<11)|(454<<1) + +#define ICCCI(ra,rb) .long 0x7c000000|\ + (ra<<16)|(rb<<11)|(966<<1) + +#define DCREAD(rt,ra,rb) .long 0x7c000000|\ + (rt<<21)|(ra<<16)|(rb<<11)|(486<<1) + +#define ICREAD(ra,rb) .long 0x7c000000|\ + (ra<<16)|(rb<<11)|(998<<1) + +#define TLBSX(rt,ra,rb) .long 0x7c000000|\ + (rt<<21)|(ra<<16)|(rb<<11)|(914<<1) + +#define TLBWE(rs,ra,ws) .long 0x7c000000|\ + (rs<<21)|(ra<<16)|(ws<<11)|(978<<1) + +#define TLBRE(rt,ra,ws) .long 0x7c000000|\ + (rt<<21)|(ra<<16)|(ws<<11)|(946<<1) + +#define TLBSXDOT(rt,ra,rb) .long 0x7c000001|\ + (rt<<21)|(ra<<16)|(rb<<11)|(914<<1) + +#define MSYNC .long 0x7c000000|\ + (598<<1) + +#define MBAR_INST .long 0x7c000000|\ + (854<<1) + +/*----------------------------------------------------------------------------+ +| Following instruction is not available in PPC405 mode of the GNU assembler. ++----------------------------------------------------------------------------*/ +#define TLBRE(rt,ra,ws) .long 0x7c000000|\ + (rt<<21)|(ra<<16)|(ws<<11)|(946<<1) + +#endif #endif /* _PPC_MMU_H_ */ |