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author | Jon Loeliger <jdl@freescale.com> | 2008-01-10 14:28:18 -0600 |
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committer | Jon Loeliger <jdl@freescale.com> | 2008-01-10 14:28:18 -0600 |
commit | bb66f5613672fc80a6b38a0e1651d893bbe590a5 (patch) | |
tree | 9a8af7224b4dc2162a5cec00cf44d5afae43622f /include/asm-ppc/immap_qe.h | |
parent | b830b7f1635984ba607219fcbd78597c28eeb529 (diff) | |
parent | 422b1a01602b6e2fbf8444a1192c7ba31461fd4c (diff) | |
download | u-boot-imx-bb66f5613672fc80a6b38a0e1651d893bbe590a5.zip u-boot-imx-bb66f5613672fc80a6b38a0e1651d893bbe590a5.tar.gz u-boot-imx-bb66f5613672fc80a6b38a0e1651d893bbe590a5.tar.bz2 |
Merge commit 'wd/master'
Diffstat (limited to 'include/asm-ppc/immap_qe.h')
-rw-r--r-- | include/asm-ppc/immap_qe.h | 33 |
1 files changed, 31 insertions, 2 deletions
diff --git a/include/asm-ppc/immap_qe.h b/include/asm-ppc/immap_qe.h index a16a6d3..39da377 100644 --- a/include/asm-ppc/immap_qe.h +++ b/include/asm-ppc/immap_qe.h @@ -513,10 +513,39 @@ typedef struct dbg { u8 res2[0x48]; } __attribute__ ((packed)) dbg_t; -/* RISC Special Registers (Trap and Breakpoint) +/* + * RISC Special Registers (Trap and Breakpoint). These are described in + * the QE Developer's Handbook. */ typedef struct rsp { - u8 fixme[0x100]; + u32 tibcr[16]; /* Trap/instruction breakpoint control regs */ + u8 res0[64]; + u32 ibcr0; + u32 ibs0; + u32 ibcnr0; + u8 res1[4]; + u32 ibcr1; + u32 ibs1; + u32 ibcnr1; + u32 npcr; + u32 dbcr; + u32 dbar; + u32 dbamr; + u32 dbsr; + u32 dbcnr; + u8 res2[12]; + u32 dbdr_h; + u32 dbdr_l; + u32 dbdmr_h; + u32 dbdmr_l; + u32 bsr; + u32 bor; + u32 bior; + u8 res3[4]; + u32 iatr[4]; + u32 eccr; /* Exception control configuration register */ + u32 eicr; + u8 res4[0x100-0xf8]; } __attribute__ ((packed)) rsp_t; typedef struct qe_immap { |