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author | Stefan Roese <sr@denx.de> | 2008-06-03 20:19:08 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2008-06-03 20:19:08 +0200 |
commit | 10a3367955bc2033b288915f8f10d0e507fe2fa1 (patch) | |
tree | c3ac82364df83db5d5cb963c64b863b77a20445c /include/asm-ppc/immap_86xx.h | |
parent | 97f7d27c8ecf34879d6b747c10fa9a18c02a4cc0 (diff) | |
parent | 1f1554841a4c8e069d331176f0c3059fb2bb8280 (diff) | |
download | u-boot-imx-10a3367955bc2033b288915f8f10d0e507fe2fa1.zip u-boot-imx-10a3367955bc2033b288915f8f10d0e507fe2fa1.tar.gz u-boot-imx-10a3367955bc2033b288915f8f10d0e507fe2fa1.tar.bz2 |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'include/asm-ppc/immap_86xx.h')
-rw-r--r-- | include/asm-ppc/immap_86xx.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h index 0b78c94..c03b4b8 100644 --- a/include/asm-ppc/immap_86xx.h +++ b/include/asm-ppc/immap_86xx.h @@ -119,7 +119,7 @@ typedef struct ccsr_ddr { uint sdram_mode_2; /* 0x211c - DDR SDRAM Mode Configuration 2 */ uint sdram_mode_cntl; /* 0x2120 - DDR SDRAM Mode Control */ uint sdram_interval; /* 0x2124 - DDR SDRAM Interval Configuration */ - uint sdram_data_init; /* 0x2128 - DDR SDRAM Data Initialization */ + uint sdram_data_init; /* 0x2128 - DDR SDRAM Data Initialization */ char res8[4]; uint sdram_clk_cntl; /* 0x2130 - DDR SDRAM Clock Control */ char res9[12]; @@ -464,7 +464,7 @@ typedef struct ccsr_dma { /* tsec1-4: 24000-28000 */ typedef struct ccsr_tsec { - uint id; /* 0x24000 - Controller ID Register */ + uint id; /* 0x24000 - Controller ID Register */ char res1[12]; uint ievent; /* 0x24010 - Interrupt Event Register */ uint imask; /* 0x24014 - Interrupt Mask Register */ @@ -538,7 +538,7 @@ typedef struct ccsr_tsec { uint rbifx; /* 0x24330 - Receive bit field extract control Register */ uint rqfar; /* 0x24334 - Receive queue filing table address Register */ uint rqfcr; /* 0x24338 - Receive queue filing table control Register */ - uint rqfpr; /* 0x2433c - Receive queue filing table property Register */ + uint rqfpr; /* 0x2433c - Receive queue filing table property Register */ uint mrblr; /* 0x24340 - Maximum Receive Buffer Length Register */ char res28[56]; uint rbdbph; /* 0x2437C - Receive Data Buffer Pointer High */ |