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| author | Vivek Mahajan <vivek.mahajan@freescale.com> | 2009-10-27 12:18:55 +0530 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2009-10-27 09:33:51 -0500 |
| commit | 70ed869ea5f6b1d13d7b140c83ec0dcd8a127ddc (patch) | |
| tree | 25395b163b80a1acae7f69b9a515f110d9bdf364 /include/asm-ppc/fsl_pci.h | |
| parent | 273a28ad9ef59dcfcd4c056ec1f61f1e0896cfaa (diff) | |
| download | u-boot-imx-70ed869ea5f6b1d13d7b140c83ec0dcd8a127ddc.zip u-boot-imx-70ed869ea5f6b1d13d7b140c83ec0dcd8a127ddc.tar.gz u-boot-imx-70ed869ea5f6b1d13d7b140c83ec0dcd8a127ddc.tar.bz2 | |
ppc/85xx/pci: fsl_pci_init: pcie agent mode support
Originally written by Jason Jin and Mingkai Hu for mpc8536.
When QorIQ based board is configured as a PCIe agent, then unlock/enable
inbound PCI configuration cycles and init a 4K inbound memory window;
so that a PCIe host can access the PCIe agents SDRAM at address 0x0
* Supported in fsl_pci_init_port() after adding pcie_ep as a param
* Revamped copyright in drivers/pci/fsl_pci_init.c
* Mods in 85xx based board specific pci init after this change
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/asm-ppc/fsl_pci.h')
| -rw-r--r-- | include/asm-ppc/fsl_pci.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/asm-ppc/fsl_pci.h b/include/asm-ppc/fsl_pci.h index 2790da7..6b0c89b 100644 --- a/include/asm-ppc/fsl_pci.h +++ b/include/asm-ppc/fsl_pci.h @@ -62,6 +62,7 @@ typedef struct pci_inbound_window { #define PIWAR_LOCAL 0x00f00000 #define PIWAR_READ_SNOOP 0x00050000 #define PIWAR_WRITE_SNOOP 0x00005000 +#define PIWAR_IWS_4K 0x0000000b u32 res2[3]; } pit_t; @@ -171,7 +172,7 @@ struct fsl_pci_info { }; int fsl_pci_init_port(struct fsl_pci_info *pci_info, - struct pci_controller *hose, int busno); + struct pci_controller *hose, int busno, int pcie_ep); #define SET_STD_PCI_INFO(x, num) \ { \ |