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authorStefan Roese <sr@denx.de>2008-08-06 14:05:38 +0200
committerStefan Roese <sr@denx.de>2008-08-06 14:05:38 +0200
commitf2302d4430e7f3f48308d6a585320fe96af8afbd (patch)
treeeec529fa883a32b0bd44f65aa46a454dc5c69688 /include/asm-ppc/fsl_lbc.h
parent9246f5ecfd353ae297a02ffd5328402acf16c9dd (diff)
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Fix merge problems
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/asm-ppc/fsl_lbc.h')
-rw-r--r--include/asm-ppc/fsl_lbc.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/include/asm-ppc/fsl_lbc.h b/include/asm-ppc/fsl_lbc.h
index c4af797..ea49ddc 100644
--- a/include/asm-ppc/fsl_lbc.h
+++ b/include/asm-ppc/fsl_lbc.h
@@ -298,4 +298,13 @@
#define LCRR_CLKDIV_4 0x00000004
#define LCRR_CLKDIV_8 0x00000008
+/* LTEDR - Transfer Error Check Disable Register
+ */
+#define LTEDR_BMD 0x80000000 /* Bus monitor disable */
+#define LTEDR_PARD 0x20000000 /* Parity error checking disabled */
+#define LTEDR_WPD 0x04000000 /* Write protect error checking diable */
+#define LTEDR_WARA 0x00800000 /* Write-after-read-atomic error checking diable */
+#define LTEDR_RAWA 0x00400000 /* Read-after-write-atomic error checking disable */
+#define LTEDR_CSD 0x00080000 /* Chip select error checking disable */
+
#endif /* __ASM_PPC_FSL_LBC_H */