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author | Li Yang <leoli@freescale.com> | 2009-12-09 14:26:08 +0800 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2010-01-05 13:49:09 -0600 |
commit | de3cbd78c9a485389b233f8ca705a9e5f51afaf3 (patch) | |
tree | a243d7187bf874f5de46b5f01bcb59c37a6e00ba /include/asm-ppc/fsl_law.h | |
parent | abc76eb6a6936a99811eda256222b3927427f8e2 (diff) | |
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fsl_law: add SRIO2 target id and law_size_bits() macro
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/asm-ppc/fsl_law.h')
-rw-r--r-- | include/asm-ppc/fsl_law.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-ppc/fsl_law.h b/include/asm-ppc/fsl_law.h index 31bb754..34c56a2 100644 --- a/include/asm-ppc/fsl_law.h +++ b/include/asm-ppc/fsl_law.h @@ -46,6 +46,8 @@ enum law_size { LAW_SIZE_32G, }; +#define law_size_bits(sz) (__ilog2_u64(sz) - 1) + #ifdef CONFIG_FSL_CORENET enum law_trgt_if { LAW_TRGT_IF_PCIE_1 = 0x00, @@ -78,6 +80,7 @@ enum law_trgt_if { LAW_TRGT_IF_CCSR = 0x08, LAW_TRGT_IF_DDR_INTRLV = 0x0b, LAW_TRGT_IF_RIO = 0x0c, + LAW_TRGT_IF_RIO_2 = 0x0d, LAW_TRGT_IF_DDR = 0x0f, LAW_TRGT_IF_DDR_2 = 0x16, /* 2nd controller */ }; |