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authorBen Warren <biggerbadderben@gmail.com>2009-01-24 20:44:56 -0800
committerBen Warren <biggerbadderben@gmail.com>2009-01-24 20:44:56 -0800
commitef29884b2708a6cce3b77f4ccaeea193d4e02c22 (patch)
tree2f6a28872ab9f5de9fec7ac878b8801f5f536eec /include/asm-ppc/fsl_ddr_sdram.h
parent4cd8ed40615a7d741ef2f09ee53779ec6907b8a6 (diff)
parent8f86a3636ef88427f880610638e80991adc41896 (diff)
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Merge git://git.denx.de/u-boot into u-boot
Diffstat (limited to 'include/asm-ppc/fsl_ddr_sdram.h')
-rw-r--r--include/asm-ppc/fsl_ddr_sdram.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/include/asm-ppc/fsl_ddr_sdram.h b/include/asm-ppc/fsl_ddr_sdram.h
index c1ea7cd..b213af3 100644
--- a/include/asm-ppc/fsl_ddr_sdram.h
+++ b/include/asm-ppc/fsl_ddr_sdram.h
@@ -34,7 +34,10 @@ typedef ddr2_spd_eeprom_t generic_spd_eeprom_t;
#elif defined(CONFIG_FSL_DDR3)
#define FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR (3) /* FIXME */
typedef ddr3_spd_eeprom_t generic_spd_eeprom_t;
+#ifndef CONFIG_FSL_SDRAM_TYPE
+#define CONFIG_FSL_SDRAM_TYPE SDRAM_TYPE_DDR3
#endif
+#endif /* #if defined(CONFIG_FSL_DDR1) */
/* define bank(chip select) interleaving mode */
#define FSL_DDR_CS0_CS1 0x40
@@ -143,6 +146,10 @@ typedef struct memctl_options_s {
unsigned int bstopre;
unsigned int tCKE_clock_pulse_width_ps; /* tCKE */
unsigned int tFAW_window_four_activates_ps; /* tFAW -- FOUR_ACT */
+
+ /* Automatic self refresh */
+ unsigned int auto_self_refresh_en;
+ unsigned int sr_it;
} memctl_options_t;
extern phys_size_t fsl_ddr_sdram(void);