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authorJon Loeliger <jdl@freescale.com>2006-08-09 13:36:54 -0500
committerJon Loeliger <jdl@freescale.com>2006-08-09 13:36:54 -0500
commit281f69ede28cd3d8be5d62a96b5a0b73e6065858 (patch)
tree8f1a0f42ce7d9c66d0ff2ecf93c9b069cbc68cc0 /include/asm-nios2
parent870cbeaa45ccdbd6566882741da9f82433bd4a86 (diff)
parent6587f7e1e98bfcb7910a47bae2eb51e9a5fbd4da (diff)
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Merge branch 'wd'
Diffstat (limited to 'include/asm-nios2')
-rw-r--r--include/asm-nios2/io.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/include/asm-nios2/io.h b/include/asm-nios2/io.h
index b16a988..0fab53b 100644
--- a/include/asm-nios2/io.h
+++ b/include/asm-nios2/io.h
@@ -39,12 +39,13 @@ extern unsigned inl (unsigned port);
#define readl(addr)\
({unsigned long val;\
asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
+
#define writeb(addr,val)\
- asm volatile ("stbio %0, 0(%1)" : : "r" (addr), "r" (val))
+ asm volatile ("stbio %1, 0(%0)" : : "r" (addr), "r" (val))
#define writew(addr,val)\
- asm volatile ("sthio %0, 0(%1)" : : "r" (addr), "r" (val))
+ asm volatile ("sthio %1, 0(%0)" : : "r" (addr), "r" (val))
#define writel(addr,val)\
- asm volatile ("stwio %0, 0(%1)" : : "r" (addr), "r" (val))
+ asm volatile ("stwio %1, 0(%0)" : : "r" (addr), "r" (val))
#define inb(addr) readb(addr)
#define inw(addr) readw(addr)