diff options
| author | Anish Trivedi <anish@freescale.com> | 2011-01-31 11:02:32 -0600 |
|---|---|---|
| committer | Anish Trivedi <anish@freescale.com> | 2011-01-31 11:02:32 -0600 |
| commit | d56b22a7f367d358d35e188da6f58310ae980cbe (patch) | |
| tree | 00cb0c4ed843e09f5f2a82881de0be6cc67d31f7 /include/asm-nios/cache.h | |
| parent | c8087980af087ef280bbf59d62fff8c2c78f79ad (diff) | |
| download | u-boot-imx-d56b22a7f367d358d35e188da6f58310ae980cbe.zip u-boot-imx-d56b22a7f367d358d35e188da6f58310ae980cbe.tar.gz u-boot-imx-d56b22a7f367d358d35e188da6f58310ae980cbe.tar.bz2 | |
ENGR00138689 MX50 Update LPDDR2 script to use more optimized settings
New LPDDR2 initialization script from designer includes
controller changes as well as very important PHY changes that increase
internal sampling window to detect DQS edge. This increase
compensates for possible jitter.
The script, Codex_LPDDR2_266MHz.inc v7, is found at
http://compass.freescale.net/livelink/
livelink?func=ll&objId=218722501&objAction=browse&viewType=1
Also removed ARM2 LPDDR2 init section since the settings for that
board are the same as the RDP (EVK).
Signed-off-by: Anish Trivedi <anish@freescale.com>
Diffstat (limited to 'include/asm-nios/cache.h')
0 files changed, 0 insertions, 0 deletions