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| author | Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> | 2008-06-07 20:51:56 +0900 |
|---|---|---|
| committer | Shinya Kuribayashi <shinya.kuribayashi@necel.com> | 2008-06-07 20:51:56 +0900 |
| commit | 8bde63eb3f79d68f693201528dafc8ae7aa087de (patch) | |
| tree | 2078062f2ecb762e6b15b5b3e628a946ca409520 /include/asm-mips/au1x00.h | |
| parent | 7daf2ebe9196dd67131a06d85049c3a8a08ca413 (diff) | |
| download | u-boot-imx-8bde63eb3f79d68f693201528dafc8ae7aa087de.zip u-boot-imx-8bde63eb3f79d68f693201528dafc8ae7aa087de.tar.gz u-boot-imx-8bde63eb3f79d68f693201528dafc8ae7aa087de.tar.bz2 | |
[MIPS] Rename Alchemy processor configs into CONFIG_SOC_*
CONFIG_SOC_AU1X00
Common Alchemy Au1x00 stuff. All Alchemy processor based machines
need to have this config as a system type specifier.
CONFIG_SOC_AU1000, CONFIG_SOC_AU1100, CONFIG_SOC_AU1200,
CONFIG_SOC_AU1500, CONFIG_SOC_AU1550
Machine type specifiers. Each port should have one of aboves.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Diffstat (limited to 'include/asm-mips/au1x00.h')
| -rw-r--r-- | include/asm-mips/au1x00.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/include/asm-mips/au1x00.h b/include/asm-mips/au1x00.h index 6a33197..2a948e8 100644 --- a/include/asm-mips/au1x00.h +++ b/include/asm-mips/au1x00.h @@ -137,7 +137,7 @@ static __inline__ int au_ffs(int x) #define CP0_DEBUG $23 /* SDRAM Controller */ -#ifdef CONFIG_AU1550 +#ifdef CONFIG_SOC_AU1550 #define MEM_SDMODE0 0xB4000800 #define MEM_SDMODE1 0xB4000808 @@ -156,7 +156,7 @@ static __inline__ int au_ffs(int x) #define MEM_SDWRMD1 0xB4000888 #define MEM_SDWRMD2 0xB4000890 -#else /* CONFIG_AU1550 */ +#else /* CONFIG_SOC_AU1550 */ #define MEM_SDMODE0 0xB4000000 #define MEM_SDMODE1 0xB4000004 @@ -174,7 +174,7 @@ static __inline__ int au_ffs(int x) #define MEM_SDWRMD1 0xB4000028 #define MEM_SDWRMD2 0xB400002C -#endif /* CONFIG_AU1550 */ +#endif /* CONFIG_SOC_AU1550 */ #define MEM_SDSLEEP 0xB4000030 #define MEM_SDSMCKE 0xB4000034 |