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authorMarkus Klotzbuecher <mk@denx.de>2008-01-09 13:57:10 +0100
committerMarkus Klotzbuecher <mk@denx.de>2008-01-09 13:57:10 +0100
commit6a40ef62c4300e9f606deef0a4618cbc4b514a51 (patch)
treec01bdd0e773d092f13af05567fa92fb9072df9e0 /include/asm-m68k
parent245a362ad3c0c1b84fccc9fec7b623eb14f6e502 (diff)
parent07eb02687f008721974a2fb54cd7fdc28033ab3c (diff)
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Merge git://www.denx.de/git/u-boot
Conflicts: board/tqm5200/tqm5200.c
Diffstat (limited to 'include/asm-m68k')
-rw-r--r--include/asm-m68k/immap_5329.h29
-rw-r--r--include/asm-m68k/io.h41
-rw-r--r--include/asm-m68k/m5329.h15
-rw-r--r--include/asm-m68k/m5445x.h4
4 files changed, 74 insertions, 15 deletions
diff --git a/include/asm-m68k/immap_5329.h b/include/asm-m68k/immap_5329.h
index 2a3980c..271c276 100644
--- a/include/asm-m68k/immap_5329.h
+++ b/include/asm-m68k/immap_5329.h
@@ -57,7 +57,8 @@
#define MMAP_PWM 0xFC090000
#define MMAP_EPORT 0xFC094000
#define MMAP_WDOG 0xFC098000
-#define MMAP_CCM 0xFC0A0000
+#define MMAP_RCM 0xFC0A0000
+#define MMAP_CCM 0xFC0A0004
#define MMAP_GPIO 0xFC0A4000
#define MMAP_RTC 0xFC0A8000
#define MMAP_LCDC 0xFC0AC000
@@ -479,20 +480,22 @@ typedef struct wdog_ctrl {
/*Chip configuration module registers */
typedef struct ccm_ctrl {
- u8 rstctrl; /* 0x00 Reset Controller register */
- u8 rststat; /* 0x01 Reset Status register */
- u16 res1; /* 0x02 - 0x03 */
- u16 ccr; /* 0x04 Chip configuration register */
- u16 res2; /* 0x06 */
- u16 rcon; /* 0x08 Rreset configuration register */
- u16 cir; /* 0x0A Chip identification register */
- u32 res3; /* 0x0C */
- u16 misccr; /* 0x10 Miscellaneous control register */
- u16 cdr; /* 0x12 Clock divider register */
- u16 uhcsr; /* 0x14 USB Host controller status register */
- u16 uocsr; /* 0x16 USB On-the-Go Controller Status Register */
+ u16 ccr; /* 0x00 Chip configuration register */
+ u16 res2; /* 0x02 */
+ u16 rcon; /* 0x04 Rreset configuration register */
+ u16 cir; /* 0x06 Chip identification register */
+ u32 res3; /* 0x08 */
+ u16 misccr; /* 0x0A Miscellaneous control register */
+ u16 cdr; /* 0x0C Clock divider register */
+ u16 uhcsr; /* 0x10 USB Host controller status register */
+ u16 uocsr; /* 0x12 USB On-the-Go Controller Status Reg */
} ccm_t;
+typedef struct rcm {
+ u8 rcr;
+ u8 rsr;
+} rcm_t;
+
/* GPIO port registers */
typedef struct gpio_ctrl {
/* Port Output Data Registers */
diff --git a/include/asm-m68k/io.h b/include/asm-m68k/io.h
index e14a581..91d7592 100644
--- a/include/asm-m68k/io.h
+++ b/include/asm-m68k/io.h
@@ -28,6 +28,20 @@
#include <asm/byteorder.h>
+/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
+ * two accesses to memory, which may be undesirable for some devices.
+ */
+#define __raw_readb(addr) \
+ ({ u8 __v = (*(volatile u8 *) (addr)); __v; })
+#define __raw_readw(addr) \
+ ({ u16 __v = (*(volatile u16 *) (addr)); __v; })
+#define __raw_readl(addr) \
+ ({ u32 __v = (*(volatile u32 *) (addr)); __v; })
+
+#define __raw_writeb(addr,b) (void)((*(volatile u8 *) (addr)) = (b))
+#define __raw_writew(addr,w) (void)((*(volatile u16 *) (addr)) = (w))
+#define __raw_writel(addr,l) (void)((*(volatile u32 *) (addr)) = (l))
+
#define readb(addr) in_8((volatile u8 *)(addr))
#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
#if !defined(__BIG_ENDIAN)
@@ -218,4 +232,31 @@ static inline void sync(void)
* compatibility (CFI driver)
*/
}
+
+/*
+ * Given a physical address and a length, return a virtual address
+ * that can be used to access the memory range with the caching
+ * properties specified by "flags".
+ */
+typedef unsigned long phys_addr_t;
+
+#define MAP_NOCACHE (0)
+#define MAP_WRCOMBINE (0)
+#define MAP_WRBACK (0)
+#define MAP_WRTHROUGH (0)
+
+static inline void *
+map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
+{
+ return (void *)paddr;
+}
+
+/*
+ * Take down a mapping set up by map_physmem().
+ */
+static inline void unmap_physmem(void *vaddr, unsigned long flags)
+{
+
+}
+
#endif /* __ASM_M68K_IO_H__ */
diff --git a/include/asm-m68k/m5329.h b/include/asm-m68k/m5329.h
index cd69fb0..3f05651 100644
--- a/include/asm-m68k/m5329.h
+++ b/include/asm-m68k/m5329.h
@@ -246,6 +246,21 @@
#define CSCR_BSTW (0x00000008)
/*********************************************************************
+* Reset Controller Module (RCM)
+*********************************************************************/
+
+/* Bit definitions and macros for RCR */
+#define RCM_RCR_FRCRSTOUT (0x40)
+#define RCM_RCR_SOFTRST (0x80)
+
+/* Bit definitions and macros for RSR */
+#define RCM_RSR_LOL (0x01)
+#define RCM_RSR_WDR_CORE (0x02)
+#define RCM_RSR_EXT (0x04)
+#define RCM_RSR_POR (0x08)
+#define RCM_RSR_SOFT (0x20)
+
+/*********************************************************************
* FlexCAN Module (CAN)
*********************************************************************/
/* Bit definitions and macros for CAN_CANMCR */
diff --git a/include/asm-m68k/m5445x.h b/include/asm-m68k/m5445x.h
index 8b886b0..b2bfb69 100644
--- a/include/asm-m68k/m5445x.h
+++ b/include/asm-m68k/m5445x.h
@@ -792,8 +792,8 @@
#define GPIO_PAR_FEC_FEC0_MASK (0xF8)
#define GPIO_PAR_FEC_FEC0_MII (0x07)
#define GPIO_PAR_FEC_FEC0_RMII_GPIO (0x03)
-#define GPIO_PAR_FEC_FEC0_RMII_ATA (0x02)
-#define GPIO_PAR_FEC_FEC0_ATA (0x01)
+#define GPIO_PAR_FEC_FEC0_RMII_ULPI (0x02)
+#define GPIO_PAR_FEC_FEC0_ULPI (0x01)
#define GPIO_PAR_FEC_FEC0_GPIO (0x00)
/* Bit definitions and macros for PAR_DMA */