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authorWolfgang Denk <wd@denx.de>2008-11-09 00:01:42 +0100
committerWolfgang Denk <wd@denx.de>2008-11-09 00:01:42 +0100
commitc06d9bbbeb0416f189e841ffb214ada6194ed874 (patch)
tree07ffabf1f239a50bb5a0d6d77745d9e83ad0c9d4 /include/asm-m68k/m5249.h
parenta80b21d5127583171d6e9bc7f722947641898012 (diff)
parente4f69d1bd21a12049744989d2dd6b5199c9b8f23 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-coldfire
Diffstat (limited to 'include/asm-m68k/m5249.h')
-rw-r--r--include/asm-m68k/m5249.h13
1 files changed, 0 insertions, 13 deletions
diff --git a/include/asm-m68k/m5249.h b/include/asm-m68k/m5249.h
index feb675c..fa0cb14 100644
--- a/include/asm-m68k/m5249.h
+++ b/include/asm-m68k/m5249.h
@@ -77,19 +77,6 @@
#define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */
#define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */
-#define MCFSIM_CSAR0 0x80 /* CS 0 Address 0 reg (r/w) */
-#define MCFSIM_CSMR0 0x84 /* CS 0 Mask 0 reg (r/w) */
-#define MCFSIM_CSCR0 0x8a /* CS 0 Control reg (r/w) */
-#define MCFSIM_CSAR1 0x8c /* CS 1 Address reg (r/w) */
-#define MCFSIM_CSMR1 0x90 /* CS 1 Mask reg (r/w) */
-#define MCFSIM_CSCR1 0x96 /* CS 1 Control reg (r/w) */
-#define MCFSIM_CSAR2 0x98 /* CS 2 Address reg (r/w) */
-#define MCFSIM_CSMR2 0x9c /* CS 2 Mask reg (r/w) */
-#define MCFSIM_CSCR2 0xa2 /* CS 2 Control reg (r/w) */
-#define MCFSIM_CSAR3 0xa4 /* CS 3 Address reg (r/w) */
-#define MCFSIM_CSMR3 0xa8 /* CS 3 Mask reg (r/w) */
-#define MCFSIM_CSCR3 0xae /* CS 3 Control reg (r/w) */
-
#define MCFSIM_DCR 0x100 /* DRAM Control reg (r/w) */
#define MCFSIM_DACR0 0x108 /* DRAM 0 Addr and Ctrl (r/w) */
#define MCFSIM_DMR0 0x10c /* DRAM 0 Mask reg (r/w) */